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Class Information
Number: 438/451
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Recessed oxide by localized oxidation (i.e., locos) > Dopant addition > Plural doping steps
Description: Process utilizing multiple steps of doping semiconductive regions of the substrate.










Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8691653 Semiconductor structure with reduced surface field effect and manufacturing process thereof Apr. 8, 2014
8609512 Method for laser singulation of chip scale packages on glass substrates Dec. 17, 2013
8445357 Method of fabricating semiconductor integrated circuit device and semiconductor integrated circuit device fabricated using the method May. 21, 2013
8389370 Radiation-tolerant integrated circuit device and method for fabricating Mar. 5, 2013
8058091 Front lit PIN/NIP diode having a continuous anode/cathode Nov. 15, 2011
7972934 Photodetector array using isolation diffusions as crosstalk inhibitors between adjacent photodiodes Jul. 5, 2011
7709365 CMOS well structure and method of forming the same May. 4, 2010
RE41181 Manufacturing method of semiconductor device Mar. 30, 2010
7682910 Method of selectively adjusting ion implantation dose on semiconductor devices Mar. 23, 2010
7666756 Methods of fabricating isolation structures in epi-less substrate Feb. 23, 2010
7550355 Low-leakage transistor and manufacturing method thereof Jun. 23, 2009
7541260 Trench diffusion isolation in semiconductor devices Jun. 2, 2009
7422924 Image device and photodiode structure Sep. 9, 2008
7361540 Method of reducing noise disturbing a signal in an electronic device Apr. 22, 2008
7329583 Method of fabricating isolated semiconductor devices in epi-less substrate Feb. 12, 2008
7279399 Method of forming isolated pocket in a semiconductor substrate Oct. 9, 2007
7235460 Method of forming active and isolation areas with split active patterning Jun. 26, 2007
7056816 Method for manufacturing semiconductor device Jun. 6, 2006
6979587 Image sensor and method for fabricating the same Dec. 27, 2005
6977204 Method for forming contact plug having double doping distribution in semiconductor device Dec. 20, 2005
6908810 Method of preventing threshold voltage of MOS transistor from being decreased by shallow trench isolation formation Jun. 21, 2005
6900091 Isolated complementary MOS devices in epi-less substrate May. 31, 2005
6846722 Method for isolating a hybrid device in an image sensor Jan. 25, 2005
6844226 System and method to reduce noise in a substrate Jan. 18, 2005
6815287 Localized array threshold voltage implant to enhance charge storage within DRAM memory cells Nov. 9, 2004
6730569 Field effect transistor with improved isolation structures May. 4, 2004
6703187 Method of forming a self-aligned twin well structure with a single mask Mar. 9, 2004
6696351 Semiconductor device having a selectively deposited conductive layer Feb. 24, 2004
6677223 Transistor with highly uniform threshold voltage Jan. 13, 2004
6660595 Implantation method for simultaneously implanting in one region and blocking the implant in another region Dec. 9, 2003
6472279 Method of manufacturing a channel stop implant in a semiconductor device Oct. 29, 2002
6362035 Channel stop ion implantation method for CMOS integrated circuits Mar. 26, 2002
6346464 Manufacturing method of semiconductor device Feb. 12, 2002
6309921 Semiconductor device and method for fabricating semiconductor device Oct. 30, 2001
6268266 Method for forming enhanced FOX region of low voltage device in high voltage process Jul. 31, 2001
6133117 Method of forming trench isolation for high voltage device Oct. 17, 2000
6121115 Methods of fabricating integrated circuit memory devices having wide and narrow channel stop layers Sep. 19, 2000
6096589 Low and high voltage CMOS devices and process for fabricating same Aug. 1, 2000
6069059 Well-drive anneal technique using preplacement of nitride films for enhanced field isolation May. 30, 2000
6054367 Ion implant of the moat encroachment region of a LOCOS field isolation to increase the radiation hardness Apr. 25, 2000
5981327 Method for forming wells of semiconductor device Nov. 9, 1999
5972753 Method of self-align cell edge implant to reduce leakage current and improve program speed in split-gate flash Oct. 26, 1999
5963811 Method of fabricating a MOS device with a localized punchthrough stopper Oct. 5, 1999
5963820 Method for forming field oxide or other insulators during the formation of a semiconductor device Oct. 5, 1999
5950079 Semiconductor processing methods of forming complementary metal oxide semiconductor memory and other circuitry Sep. 7, 1999
5927991 Method for forming triple well in semiconductor device Jul. 27, 1999
5895258 Semiconductor device fabrication method Apr. 20, 1999
5888873 Method of manufacturing short channel MOS devices Mar. 30, 1999
5830790 High voltage transistor of semiconductor memory devices Nov. 3, 1998
5789287 Method of forming field isolation in manufacturing a semiconductor device Aug. 4, 1998

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