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Class Information
Number: 438/447
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Recessed oxide by localized oxidation (i.e., locos) > Preliminary etching of groove > Masking of groove sidewall > Dopant addition
Description: Process including a step of introducing an electrically active dopant species into semiconductive regions of the substrate.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8492241 Method for simultaneously forming a through silicon via and a deep trench structure Jul. 23, 2013
8128748 Aqueous two-component organoalkoxysilane composition Mar. 6, 2012
8071455 Isolation structures for preventing photons and carriers from reaching active areas and methods of formation Dec. 6, 2011
8003424 Method for fabricating CMOS image sensor with pocket photodiode for minimizng image lag Aug. 23, 2011
7951679 Method for fabricating semiconductor device May. 31, 2011
7658860 Metal pattern and process for producing the same Feb. 9, 2010
7659179 Method of forming transistor using step STI profile in memory device Feb. 9, 2010
7625776 Methods of fabricating intermediate semiconductor structures by selectively etching pockets of implanted silicon Dec. 1, 2009
7534691 Isolation structures for preventing photons and carriers from reaching active areas and methods of formation May. 19, 2009
7358108 CMOS image sensor and method for fabricating the same Apr. 15, 2008
7235460 Method of forming active and isolation areas with split active patterning Jun. 26, 2007
7081397 Trench sidewall passivation for lateral RIE in a selective silicon-on-insulator process flow Jul. 25, 2006
7067387 Method of manufacturing dielectric isolated silicon structure Jun. 27, 2006
7033896 Field effect transistor with a high breakdown voltage and method of manufacturing the same Apr. 25, 2006
7029826 Method to restore hydrophobicity in dielectric films and materials Apr. 18, 2006
6949445 Method of forming angled implant for trench isolation Sep. 27, 2005
6921705 Method for forming isolation layer of semiconductor device Jul. 26, 2005
6803265 Liner for semiconductor memories and manufacturing method therefor Oct. 12, 2004
6784076 Process for making a silicon-on-insulator ledge by implanting ions from silicon source Aug. 31, 2004
6696350 Method of fabricating memory device Feb. 24, 2004
6627516 Method of fabricating a light receiving device Sep. 30, 2003
6579778 Source bus formation for a flash memory using silicide Jun. 17, 2003
6465308 Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant Oct. 15, 2002
6429093 Sidewall process for forming a low resistance source line Aug. 6, 2002
6297130 Recessed, sidewall-sealed and sandwiched poly-buffered LOCOS isolation methods Oct. 2, 2001
6284626 Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench Sep. 4, 2001
6121097 Semiconductor device manufacturing method Sep. 19, 2000
6121115 Methods of fabricating integrated circuit memory devices having wide and narrow channel stop layers Sep. 19, 2000
6001707 Method for forming shallow trench isolation structure Dec. 14, 1999
5976768 Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby Nov. 2, 1999
5972778 Method of fabricating semiconductor device Oct. 26, 1999
5960301 Method of forming isolation layer of semiconductor device Sep. 28, 1999
5950078 Rapid thermal annealing with absorptive layers for thin film transistors on transparent substrates Sep. 7, 1999
5915191 Method for fabricating a semiconductor device with improved device integration and field-region insulation Jun. 22, 1999
5904538 Method for developing shallow trench isolation in a semiconductor memory device May. 18, 1999
5834360 Method of forming an improved planar isolation structure in an integrated circuit Nov. 10, 1998
5686327 Method for fabricating semiconductor device Nov. 11, 1997
5686347 Self isolation manufacturing method Nov. 11, 1997
5679599 Isolation using self-aligned trench formation and conventional LOCOS Oct. 21, 1997
5637529 Method for forming element isolation insulating film of semiconductor device Jun. 10, 1997
5470770 Manufacturing method of semiconductor device Nov. 28, 1995
5395790 Stress-free isolation layer Mar. 7, 1995
5374584 Method for isolating elements in a semiconductor chip Dec. 20, 1994
5374583 Technology for local oxidation of silicon Dec. 20, 1994
5372950 Method for forming isolation regions in a semiconductor memory device Dec. 13, 1994
5371036 Locos technology with narrow silicon trench Dec. 6, 1994
5352626 Method for making a semiconductor device having an isolated layer region on the side wall of a groove Oct. 4, 1994
5298451 Recessed and sidewall-sealed poly-buffered LOCOS isolation methods Mar. 29, 1994
5254495 Salicide recessed local oxidation of silicon Oct. 19, 1993
5139964 Method for forming isolation region of semiconductor device Aug. 18, 1992

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