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Class Information
Number: 438/446
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Recessed oxide by localized oxidation (i.e., locos) > Preliminary etching of groove > Masking of groove sidewall > Polysilicon containing sidewall
Description: Process utilizing a polysilicon containing component for masking the groove sidewalls.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8502325 Metal high-K transistor having silicon sidewalls for reduced parasitic capacitance Aug. 6, 2013
8409787 Method of forming a pattern in a semiconductor device and method of forming a gate using the same Apr. 2, 2013
8216907 Process to fabricate a metal high-K transistor having first and second silicon sidewalls for reduced parasitic capacitance Jul. 10, 2012
8173505 Method of making a split gate memory cell May. 8, 2012
8076198 Method of fabricating nonvolatile memory device Dec. 13, 2011
7914973 Method of forming a pattern in a semiconductor device and method of forming a gate using the same Mar. 29, 2011
7855135 Method to reduce parastic capacitance in a metal high dielectric constant (MHK) transistor Dec. 21, 2010
7843007 Metal high-k transistor having silicon sidewall for reduced parasitic capacitance Nov. 30, 2010
7816218 Selective deposition of amorphous silicon films on metal gates Oct. 19, 2010
7648864 Semiconductor structure including mixed rare earth oxide formed on silicon Jan. 19, 2010
7648924 Method of manufacturing spacer Jan. 19, 2010
7622191 Titania-based coating for capillary microextraction Nov. 24, 2009
7462550 Method of forming a trench semiconductor device and structure therefor Dec. 9, 2008
7397070 Self-aligned transistor Jul. 8, 2008
7329572 Method of forming PIP capacitor Feb. 12, 2008
7300850 Method of forming a self-aligned transistor Nov. 27, 2007
7247569 Ultra-thin Si MOSFET device structure and method of manufacture Jul. 24, 2007
7179584 Exposure method and device for forming patterns on printed wiring board Feb. 20, 2007
7067391 Method to form a metal silicide gate device Jun. 27, 2006
6835640 Method of forming a novel composite insulator spacer Dec. 28, 2004
6720233 Method of producing trench insulation in a substrate Apr. 13, 2004
6682820 Recession resistant coated ceramic part Jan. 27, 2004
6661055 Transistor in semiconductor devices Dec. 9, 2003
6649488 Method of shallow trench isolation Nov. 18, 2003
6627516 Method of fabricating a light receiving device Sep. 30, 2003
6613651 Integrated circuit isolation system Sep. 2, 2003
6514816 Method of fabricating a self-aligned shallow trench isolation Feb. 4, 2003
6482718 Method of manufacturing semiconductor device Nov. 19, 2002
6444539 Method for producing a shallow trench isolation filled with thermal oxide Sep. 3, 2002
6319743 Method of making thin film piezoresistive sensor Nov. 20, 2001
6306726 Method of forming field oxide Oct. 23, 2001
6255188 Method of removing a polysilicon buffer using an etching selectivity solution Jul. 3, 2001
6171930 Device isolation structure and device isolation method for a semiconductor power integrated circuit Jan. 9, 2001
6153482 Method for fabricating LOCOS isolation having a planar surface which includes having the polish stop layer at a lower level than the LOCOS formation Nov. 28, 2000
6133113 Method of manufacturing shallow trench isolation Oct. 17, 2000
6121097 Semiconductor device manufacturing method Sep. 19, 2000
6114218 Texturized polycrystalline silicon to aid field oxide formation Sep. 5, 2000
6093622 Isolation method of semiconductor device using second pad oxide layer formed through chemical vapor deposition (CVD) Jul. 25, 2000
6074932 Method for forming a stress-free shallow trench isolation Jun. 13, 2000
6074939 Method for fabricating semiconductor device Jun. 13, 2000
5963820 Method for forming field oxide or other insulators during the formation of a semiconductor device Oct. 5, 1999
5956600 Method of manufacturing a semiconductor device Sep. 21, 1999
5866467 Method of improving oxide isolation in a semiconductor device Feb. 2, 1999
5837596 Field oxide formation by oxidation of polysilicon layer Nov. 17, 1998
5834360 Method of forming an improved planar isolation structure in an integrated circuit Nov. 10, 1998
5824594 Integrated circuit device isolating methods including silicon spacers and oxidation barrier films Oct. 20, 1998
5763316 Substrate isolation process to minimize junction leakage Jun. 9, 1998
5679601 LOCOS method using encapsulating polysilicon/silicon nitride spacer Oct. 21, 1997
5658822 Locos method with double polysilicon/silicon nitride spacer Aug. 19, 1997
5629230 Semiconductor processing method of forming field oxide regions on a semiconductor substrate utilizing a laterally outward projecting foot portion May. 13, 1997

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