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Class Information
Number: 438/437
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > Multiple insulative layers in groove > Conformal insulator formation
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material including forming an insulative layer which follows the contour of the groove.










Patents under this class:
1 2 3 4 5 6 7 8 9

Patent Number Title Of Patent Date Issued
5175122 Planarization process for trench isolation in integrated circuit manufacture Dec. 29, 1992
5102822 Planar-type microwave integrated circuit with at least one mesa component, method of fabrication thereof Apr. 7, 1992
5098856 Air-filled isolation trench with chemically vapor deposited silicon dioxide cap Mar. 24, 1992
5068202 Process for excavating trenches with a rounded bottom in a silicon substrate for making trench isolation structures Nov. 26, 1991
5004703 Multiple trench semiconductor structure method Apr. 2, 1991
4982269 Blanar-type microwave integrated circuit with at least one mesa component, method of fabrication thereof Jan. 1, 1991
4962064 Method of planarization of topologies in integrated circuit structures Oct. 9, 1990
4960727 Method for forming a dielectric filled trench Oct. 2, 1990
4954459 Method of planarization of topologies in integrated circuit structures Sep. 4, 1990
4952524 Semiconductor device manufacture including trench formation Aug. 28, 1990
4931409 Method of manufacturing semiconductor device having trench isolation Jun. 5, 1990
4923821 Forming trench in semiconductor substrate with rounded corners May. 8, 1990
4906585 Method for manufacturing wells for CMOS transistor circuits separated by insulating trenches Mar. 6, 1990
4900692 Method of forming an oxide liner and active area mask for selective epitaxial growth in an isolation trench Feb. 13, 1990
4882291 Process for the production of electrical isolation zones in a CMOS integrated circuit Nov. 21, 1989
4876217 Method of forming semiconductor structure isolation regions Oct. 24, 1989
4876216 Semiconductor integrated circuit manufacturing process providing oxide-filled trench isolation of circuit devices Oct. 24, 1989
4871689 Multilayer trench isolation process and structure Oct. 3, 1989
4839306 Method of manufacturing a trench filled with an insulating material in a semiconductor substrate Jun. 13, 1989
4835115 Method for forming oxide-capped trench isolation May. 30, 1989
4795721 Walled slot devices and method of making same Jan. 3, 1989
4762728 Low temperature plasma nitridation process and applications of nitride films formed thereby Aug. 9, 1988
4727048 Process for making isolated semiconductor structure Feb. 23, 1988
4666556 Trench sidewall isolation by polysilicon oxidation May. 19, 1987
4663832 Method for improving the planarity and passivation in a semiconductor isolation trench arrangement May. 12, 1987
4639288 Process for formation of trench in integrated circuit structure using isotropic and anisotropic etching Jan. 27, 1987
4635090 Tapered groove IC isolation Jan. 6, 1987
4631803 Method of fabricating defect free trench isolation devices Dec. 30, 1986
4630343 Product for making isolated semiconductor structure Dec. 23, 1986
4606936 Stress free dielectric isolation technology Aug. 19, 1986
4571819 Method for forming trench isolation structures Feb. 25, 1986
4570325 Manufacturing a field oxide region for a semiconductor device Feb. 18, 1986
4407851 Method for manufacturing semiconductor device Oct. 4, 1983
4404735 Method for manufacturing a field isolation structure for a semiconductor device Sep. 20, 1983
4396460 Method of forming groove isolation in a semiconductor device Aug. 2, 1983
4385975 Method of forming wide, deep dielectric filled isolation trenches in the surface of a silicon semiconductor substrate May. 31, 1983
4356211 Forming air-dielectric isolation regions in a monocrystalline silicon substrate by differential oxidation of polysilicon Oct. 26, 1982
4331708 Method of fabricating narrow deep grooves in silicon May. 25, 1982
4310965 Process for producing a dielectric insulator separated substrate Jan. 19, 1982
4169000 Method of forming an integrated circuit structure with fully-enclosed air isolation Sep. 25, 1979
4155783 Semiconductor structures and methods for manufacturing such structures May. 22, 1979
4104086 Method for forming isolated regions of silicon utilizing reactive ion etching Aug. 1, 1978
3976524 Planarization of integrated circuit surfaces through selective photoresist masking Aug. 24, 1976
3969168 Method for filling grooves and moats used on semiconductor devices Jul. 13, 1976

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