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Class Information
Number: 438/435
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > Multiple insulative layers in groove
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with plural insulative layers.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622369 |
Device isolation technology on semiconductor substrate |
Nov. 24, 2009 |
| 7618876 |
Semiconductor device and method of manufacturing the same by filling a trench which includes an additional coating step |
Nov. 17, 2009 |
| 7611964 |
Method of forming isolation layer of semiconductor memory device |
Nov. 3, 2009 |
| 7608519 |
Method of fabricating trench isolation of semiconductor device |
Oct. 27, 2009 |
| 7605049 |
Optical semiconductor device and manufacturing method for same |
Oct. 20, 2009 |
| 7601607 |
Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects |
Oct. 13, 2009 |
| 7601608 |
Memory array buried digit line |
Oct. 13, 2009 |
| 7595224 |
Method for manufacturing integrated circuit |
Sep. 29, 2009 |
| 7582560 |
Method for fabricating semiconductor device |
Sep. 1, 2009 |
| 7575981 |
Method for fabricating isolation layer in semiconductor device |
Aug. 18, 2009 |
| 7563690 |
Method for forming shallow trench isolation region |
Jul. 21, 2009 |
| 7553741 |
Manufacturing method of semiconductor device |
Jun. 30, 2009 |
| 7550397 |
Method of manufacturing a semiconductor device having a pre-metal dielectric liner |
Jun. 23, 2009 |
| 7541259 |
Semiconductor device having a compressed device isolation structure |
Jun. 2, 2009 |
| 7538009 |
Method for fabricating STI gap fill oxide layer in semiconductor devices |
May. 26, 2009 |
| 7534698 |
Methods of forming semiconductor devices having multilayer isolation structures |
May. 19, 2009 |
| 7528052 |
Method for fabricating semiconductor device with trench isolation structure |
May. 5, 2009 |
| 7514338 |
Method of manufacturing a semiconductor device |
Apr. 7, 2009 |
| 7514742 |
Recessed shallow trench isolation |
Apr. 7, 2009 |
| 7507635 |
CMOS image sensor and method of fabricating the same |
Mar. 24, 2009 |
| 7504704 |
Shallow trench isolation process |
Mar. 17, 2009 |
| 7504304 |
Non-volatile semiconductor memory device and process of manufacturing the same |
Mar. 17, 2009 |
| 7501326 |
Method for forming isolation layer of semiconductor device |
Mar. 10, 2009 |
| 7498233 |
Method of forming an insulation layer structure having a concave surface and method of manufacturing a memory device using the same |
Mar. 3, 2009 |
| 7494895 |
Method of fabricating a three-dimensional MOSFET employing a hard mask spacer |
Feb. 24, 2009 |
| 7494894 |
Protection in integrated circuits |
Feb. 24, 2009 |
| 7491621 |
Method of forming isolation structures in a semiconductor manufacturing process |
Feb. 17, 2009 |
| 7482244 |
Method of preventing a peeling issue of a high stressed thin film |
Jan. 27, 2009 |
| 7482245 |
Stress profile modulation in STI gap fill |
Jan. 27, 2009 |
| 7479440 |
Method of forming an isolation structure that includes forming a silicon layer at a base of the recess |
Jan. 20, 2009 |
| 7473615 |
Semiconductor processing methods |
Jan. 6, 2009 |
| 7449393 |
Method of manufacturing a semiconductor device with a shallow trench isolation structure |
Nov. 11, 2008 |
| 7442618 |
Method to engineer etch profiles in Si substrate for advanced semiconductor devices |
Oct. 28, 2008 |
| 7442620 |
Methods for forming a trench isolation structure with rounded corners in a silicon substrate |
Oct. 28, 2008 |
| 7442621 |
Semiconductor process for forming stress absorbent shallow trench isolation structures |
Oct. 28, 2008 |
| 7439157 |
Isolation trenches for memory devices |
Oct. 21, 2008 |
| 7439155 |
Isolation techniques for reducing dark current in CMOS image sensors |
Oct. 21, 2008 |
| 7439141 |
Shallow trench isolation approach for improved STI corner rounding |
Oct. 21, 2008 |
| 7432148 |
Shallow trench isolation by atomic-level silicon reconstruction |
Oct. 7, 2008 |
| 7429520 |
Methods for forming trench isolation |
Sep. 30, 2008 |
| 7402500 |
Methods of forming shallow trench isolation structures in semiconductor devices |
Jul. 22, 2008 |
| 7402499 |
Semiconductor device and method of manufacturing the same |
Jul. 22, 2008 |
| 7402498 |
Methods of forming trench isolation regions |
Jul. 22, 2008 |
| 7402473 |
Semiconductor device and process for producing the same |
Jul. 22, 2008 |
| 7399679 |
Narrow width effect improvement with photoresist plug process and STI corner ion implantation |
Jul. 15, 2008 |
| 7396739 |
Method for integrating an electronic component or similar into a substrate |
Jul. 8, 2008 |
| 7396729 |
Methods of forming semiconductor devices having a trench with beveled corners |
Jul. 8, 2008 |
| 7393756 |
Method for fabricating a trench isolation structure having a high aspect ratio |
Jul. 1, 2008 |
| 7393751 |
Semiconductor structure including laminated isolation region |
Jul. 1, 2008 |
| 7393755 |
Dummy fill for integrated circuits |
Jul. 1, 2008 |
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