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Class Information
Number: 438/434
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > Dopant addition > From doped insulator in groove
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material wherein the semiconductor regions are doped from a doped insulator residing in the groove.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8551818 Method of manufacturing electronic device and display Oct. 8, 2013
8476143 Deep contacts of integrated electronic devices based on regions implanted through trenches Jul. 2, 2013
8368170 Reducing device performance drift caused by large spacings between active regions Feb. 5, 2013
8338265 Silicided trench contact to buried conductive layer Dec. 25, 2012
8334160 Semiconductor photovoltaic devices and methods of manufacturing the same Dec. 18, 2012
8278183 Production of isolation trenches with different sidewall dopings Oct. 2, 2012
8236710 Technique to create a buried plate in embedded dynamic random access memory device Aug. 7, 2012
8216913 Strain modulation in active areas by controlled incorporation of nitrogen at si-SiO2 interface Jul. 10, 2012
8115271 Reducing device performance drift caused by large spacings between active regions Feb. 14, 2012
8048760 Semiconductor structure and method of manufacture Nov. 1, 2011
8022481 Robust shallow trench isolation structures and a method for forming shallow trench isolation structures Sep. 20, 2011
8017496 Methods of manufacturing a semiconductor device Sep. 13, 2011
7977202 Reducing device performance drift caused by large spacings between active regions Jul. 12, 2011
7968424 Method of implantation Jun. 28, 2011
7927958 System and method for providing a self aligned bipolar transistor using a silicon nitride ring Apr. 19, 2011
7858155 Plasma processing method and plasma processing apparatus Dec. 28, 2010
7851308 Method of producing a semiconductor device having a trench-stuffed layer Dec. 14, 2010
7790568 Method for fabricating semiconductor device Sep. 7, 2010
7767500 Superjunction device with improved ruggedness Aug. 3, 2010
7727856 Selective STI stress relaxation through ion implantation Jun. 1, 2010
7468307 Semiconductor structure and method Dec. 23, 2008
7459373 Method for fabricating and separating semiconductor devices Dec. 2, 2008
7273794 Shallow trench isolation fill by liquid phase deposition of SiO2 Sep. 25, 2007
7189629 Method for isolating semiconductor devices Mar. 13, 2007
7109094 Method for preventing leakage in shallow trench isolation Sep. 19, 2006
7078313 Method for fabricating an integrated semiconductor circuit to prevent formation of voids Jul. 18, 2006
7078315 Method for eliminating inverse narrow width effects in the fabrication of DRAM device Jul. 18, 2006
6949446 Method of shallow trench isolation formation and planarization Sep. 27, 2005
6939741 IC chip manufacturing method Sep. 6, 2005
6911374 Fabrication method for shallow trench isolation region Jun. 28, 2005
6787877 Method for filling structural gaps and integrated circuitry Sep. 7, 2004
6773975 Formation of a shallow trench isolation structure in integrated circuits Aug. 10, 2004
6750116 Method for fabricating asymmetric inner structure in contacts or trenches Jun. 15, 2004
6551903 Melt through contact formation method Apr. 22, 2003
6541350 Method for fabricating shallow trench isolation Apr. 1, 2003
6524499 Transparent conductive film and display device Feb. 25, 2003
6475865 Method of fabricating semiconductor device Nov. 5, 2002
6465304 Method for fabricating a power semiconductor device having a floating island voltage sustaining layer Oct. 15, 2002
6399468 Semiconductor device and method of manufacturing the same Jun. 4, 2002
6388304 Semiconductor device having buried-type element isolation structure and method of manufacturing the same May. 14, 2002
6376331 Method for manufacturing a semiconductor device Apr. 23, 2002
6316330 Method of fabricating a shallow trench isolation semiconductor device Nov. 13, 2001
6313009 Fabrication method of semiconductor memory device with impurity regions surrounding recess Nov. 6, 2001
6284626 Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench Sep. 4, 2001
6281068 Method for buried plate formation in deep trench capacitors Aug. 28, 2001
6268297 Self-planarizing low-temperature doped-silicate-glass process capable of gap-filling narrow spaces Jul. 31, 2001
6265292 Method of fabrication of a novel flash integrated circuit Jul. 24, 2001
6248645 Semiconductor device having buried-type element isolation structure and method of manufacturing the same Jun. 19, 2001
6225188 Self aligned method for differential oxidation rate at shallow trench isolation edge May. 1, 2001
6214698 Shallow trench isolation methods employing gap filling doped silicon oxide dielectric layer Apr. 10, 2001

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