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Class Information
Number: 438/432
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > And deposition of polysilicon or noninsulative material into groove > Oxidation of deposited material > Nonoxidized portions remaining in groove after oxidation
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material wherein at least a portion of the polysilicon or noninsulative material deposited into the groove remains after the oxidation step.










Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8652925 Method of fabricating isolated capacitors and structure thereof Feb. 18, 2014
8586449 Raised isolation structure self-aligned to fin structures Nov. 19, 2013
8546162 Method for forming light guide layer in semiconductor substrate Oct. 1, 2013
8530998 Substrate compositions and methods for forming semiconductor on insulator devices Sep. 10, 2013
8431457 Method for fabricating a shielded gate trench MOS with improved source pickup layout Apr. 30, 2013
8278184 Fabrication method of a non-planar transistor Oct. 2, 2012
8242004 Semiconductor device and method of fabricating the same Aug. 14, 2012
8062954 Method for manufacturing a field plate in a trench of a power transistor Nov. 22, 2011
8043933 Integration sequences with top surface profile modification Oct. 25, 2011
8035190 Semiconductor devices Oct. 11, 2011
7981700 Semiconductor oxidation apparatus and method of producing semiconductor element Jul. 19, 2011
7951679 Method for fabricating semiconductor device May. 31, 2011
7888234 Method for manufacturing a semiconductor body with a trench and semiconductor body with a trench Feb. 15, 2011
7858499 Dicing tape and die attach adhesive with patterned backing Dec. 28, 2010
7736963 Method of forming a gate structure for a semiconductor device and method of forming a cell gate structure for a non-volatile memory device Jun. 15, 2010
7579625 CMOS image sensor and method for manufacturing the same Aug. 25, 2009
7560360 Methods for enhancing trench capacitance and trench capacitor Jul. 14, 2009
7538009 Method for fabricating STI gap fill oxide layer in semiconductor devices May. 26, 2009
7462550 Method of forming a trench semiconductor device and structure therefor Dec. 9, 2008
7439156 Method for manufacturing semiconductor device Oct. 21, 2008
7381625 Deterministic process for constructing nanodevices Jun. 3, 2008
7371655 Method of fabricating low-power CMOS device May. 13, 2008
7303961 Method for producing a junction region between a trench and a semiconductor zone surrounding the trench Dec. 4, 2007
7288463 Pulsed deposition layer gap fill with expansion material Oct. 30, 2007
7279396 Methods of forming trench isolation regions with nitride liner Oct. 9, 2007
7259074 Trench isolation method in flash memory device Aug. 21, 2007
7176105 Dielectric gap fill with oxide selectively deposited over silicon liner Feb. 13, 2007
7056805 Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby Jun. 6, 2006
7029988 Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium Apr. 18, 2006
7015115 Method for forming deep trench isolation and related structure Mar. 21, 2006
6913984 Method of manufacturing memory with nano dots Jul. 5, 2005
6884687 SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A Apr. 26, 2005
6878606 Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium Apr. 12, 2005
6861311 SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A Mar. 1, 2005
6838355 Damascene interconnect structures including etchback for low-k dielectric materials Jan. 4, 2005
6784042 Integration process on a SOI substrate of a semiconductor device comprising at least a dielectrically isolated well Aug. 31, 2004
6737336 Semiconductor device and manufacturing method therefor May. 18, 2004
6734081 Shallow trench isolation structure for laser thermal processing May. 11, 2004
6727157 Method for forming a shallow trench isolation using air gap Apr. 27, 2004
6720233 Method of producing trench insulation in a substrate Apr. 13, 2004
6696349 STI leakage reduction Feb. 24, 2004
6682820 Recession resistant coated ceramic part Jan. 27, 2004
6617223 Semiconductor-on-insulator structure fabrication having a temporary plug Sep. 9, 2003
6583060 Dual depth trench isolation Jun. 24, 2003
6573154 High aspect ratio trench isolation process for surface micromachined sensors and actuators Jun. 3, 2003
6566226 Semiconductor device and fabrication process thereof, method of forming a device isolation structure May. 20, 2003
6559030 Method of forming a recessed polysilicon filled trench May. 6, 2003
6518145 Methods to control the threshold voltage of a deep trench corner device Feb. 11, 2003
6489193 Process for device isolation Dec. 3, 2002
6461887 Method to form an inverted staircase STI structure by etch-deposition-etch and selective epitaxial growth Oct. 8, 2002

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