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Class Information
Number: 438/431
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > And deposition of polysilicon or noninsulative material into groove > Oxidation of deposited material
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material including a step of oxidizing the polysilicon or noninsulative material deposited into the groove.










Sub-classes under this class:

Class Number Class Name Patents
438/432 Nonoxidized portions remaining in groove after oxidation 129


Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8710510 High power insulated gate bipolar transistors Apr. 29, 2014
8603879 Method for fabricating super-junction power device with reduced miller capacitance Dec. 10, 2013
8592284 Semiconductor device and manufacturing method thereof Nov. 26, 2013
8518799 Process of making semiconductor on glass substrates with a stiffening layer Aug. 27, 2013
8491799 Method for forming magnetic tunnel junction cell Jul. 23, 2013
8435850 Localized compressive strained semiconductor May. 7, 2013
8431457 Method for fabricating a shielded gate trench MOS with improved source pickup layout Apr. 30, 2013
8334167 Method of manufacturing photoelectric conversion device Dec. 18, 2012
8329553 Method for manufacturing semiconductor device and NAND-type flash memory Dec. 11, 2012
8304322 Methods of filling isolation trenches for semiconductor devices and resulting structures Nov. 6, 2012
8293618 Semiconductor device and method of forming the same Oct. 23, 2012
8242004 Semiconductor device and method of fabricating the same Aug. 14, 2012
8241994 Method for fabricating isolation layer in semiconductor device Aug. 14, 2012
8227309 Localized compressive strained semiconductor Jul. 24, 2012
8168548 UV-assisted dielectric formation for devices with strained germanium-containing layers May. 1, 2012
8163626 Enhancing NAND flash floating gate performance Apr. 24, 2012
8158487 Annealing process for annealing a structure Apr. 17, 2012
8124494 Method for reshaping silicon surfaces with shallow trench isolation Feb. 28, 2012
7977205 Method of forming isolation layer of semiconductor device Jul. 12, 2011
7972933 Method of selective nitridation Jul. 5, 2011
7968423 Method for forming isolation layer and method for fabricating nonvolatile memory device using the same Jun. 28, 2011
7960244 Process for the aligned manufacture of electronic semiconductor devices in a SOI substrate Jun. 14, 2011
7951679 Method for fabricating semiconductor device May. 31, 2011
7939421 Method for fabricating integrated circuit structures May. 10, 2011
7897498 Method for manufacturing semiconductor device Mar. 1, 2011
7879685 System and method for creating electric isolation between layers comprising solar cells Feb. 1, 2011
7851383 Method and system for forming a controllable gate oxide Dec. 14, 2010
7795159 Charge trap layer for a charge trap semiconductor memory device and method of manufacturing the same Sep. 14, 2010
7736963 Method of forming a gate structure for a semiconductor device and method of forming a cell gate structure for a non-volatile memory device Jun. 15, 2010
7723205 Semiconductor device, manufacturing method thereof, liquid crystal display device, RFID tag, light emitting device, and electronic device May. 25, 2010
7659181 Sub-micron space liner and filler process Feb. 9, 2010
7648878 Method for fabricating semiconductor device with recess gate Jan. 19, 2010
7648886 Shallow trench isolation process Jan. 19, 2010
7622769 Isolation trench Nov. 24, 2009
7566612 Method of fabricating capacitor in semiconductor device and semiconductor device using the same Jul. 28, 2009
7541259 Semiconductor device having a compressed device isolation structure Jun. 2, 2009
7479440 Method of forming an isolation structure that includes forming a silicon layer at a base of the recess Jan. 20, 2009
7470595 Oxidizing a metal layer for a dielectric having a platinum electrode Dec. 30, 2008
7422961 Method of forming isolation regions for integrated circuits Sep. 9, 2008
7402886 Memory with self-aligned trenches for narrow gap isolation regions Jul. 22, 2008
7371655 Method of fabricating low-power CMOS device May. 13, 2008
7365362 Semiconductor device and method of fabricating semiconductor device using oxidation Apr. 29, 2008
7361562 Method of manufacturing semiconductor device Apr. 22, 2008
7361558 Method of manufacturing a closed cell trench MOSFET Apr. 22, 2008
7303961 Method for producing a junction region between a trench and a semiconductor zone surrounding the trench Dec. 4, 2007
7300855 Reversible oxidation protection of microcomponents Nov. 27, 2007
7300884 Pattern forming method, underlayer film forming composition, and method of manufacturing semiconductor device Nov. 27, 2007
7288463 Pulsed deposition layer gap fill with expansion material Oct. 30, 2007
7279394 Method for forming wall oxide layer and isolation layer in flash memory device Oct. 9, 2007
7262110 Trench isolation structure and method of formation Aug. 28, 2007

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