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Class Information
Number: 438/429
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > And epitaxial semiconductor formation in groove
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material including a step of epitaxially depositing semiconductive material in the groove.










Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8709910 Semiconductor process Apr. 29, 2014
8703578 Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations Apr. 22, 2014
8686474 III-V compound semiconductor epitaxy from a non-III-V substrate Apr. 1, 2014
8673706 Methods of forming layers comprising epitaxial silicon Mar. 18, 2014
8629534 Semiconductor structure having low thermal stress Jan. 14, 2014
8629040 Methods for epitaxially growing active regions between STI regions Jan. 14, 2014
8623742 Reduced STI loss for superior surface planarity of embedded stressors in densely packed semiconductor devices Jan. 7, 2014
8603894 Stressed source/drain CMOS and method for forming same Dec. 10, 2013
8603879 Method for fabricating super-junction power device with reduced miller capacitance Dec. 10, 2013
8580650 Lateral superjunction extended drain MOS transistor Nov. 12, 2013
8541278 Method for fabricating super-junction power device with reduced miller capacitance Sep. 24, 2013
8507357 Method for lift-off of light-emitting diode substrate Aug. 13, 2013
8501578 Semiconductor structure formed without requiring thermal oxidation Aug. 6, 2013
8502350 Stacked layers of nitride semiconductor and method for manufacturing the same Aug. 6, 2013
8501582 Semiconductor structure having low thermal stress and method for manufacturing thereof Aug. 6, 2013
8487316 Method of manufacturing an integrated semiconductor substrate structure with device areas for definition of GaN-based devices and CMOS devices Jul. 16, 2013
8481402 Epitaxy silicon on insulator (ESOI) Jul. 9, 2013
8464418 Method for temperature compensation in MEMS resonators with isolated regions of distinct material Jun. 18, 2013
8415224 Method of fabricating a semiconductor device including forming trenches having particular structures Apr. 9, 2013
8394704 Method for fabricating a dual-orientation group-IV semiconductor substrate Mar. 12, 2013
8395230 Semiconductor device and method of manufacturing the same Mar. 12, 2013
8395217 Isolation in CMOSFET devices utilizing buried air bags Mar. 12, 2013
8389391 Triple-gate transistor with reverse shallow trench isolation Mar. 5, 2013
8377796 III-V compound semiconductor epitaxy from a non-III-V substrate Feb. 19, 2013
8372738 Method for manufacturing a gallium nitride based semiconductor device with improved termination scheme Feb. 12, 2013
8354327 Scheme for planarizing through-silicon vias Jan. 15, 2013
8236665 Method for manufacturing semiconductor device with SEG film active region Aug. 7, 2012
8211770 Transistor with A-face conductive channel and trench protecting well region Jul. 3, 2012
8173513 Method for manufacturing a semiconductor pressure sensor May. 8, 2012
8173505 Method of making a split gate memory cell May. 8, 2012
8154050 Semiconductor device with semiconductor epitaxial layers buried in source/drain regions, and fabrication method of the same Apr. 10, 2012
8114755 Method of manufacturing semiconductor device Feb. 14, 2012
8071442 Transistor with embedded Si/Ge material having reduced offset to the channel region Dec. 6, 2011
8062953 Semiconductor devices with extended active regions Nov. 22, 2011
8058091 Front lit PIN/NIP diode having a continuous anode/cathode Nov. 15, 2011
8048765 Method for fabricating a MOS transistor with source/well heterojunction and related structure Nov. 1, 2011
8043919 Method of fabricating semiconductor device Oct. 25, 2011
8039357 Integrated circuitry and methods of forming a semiconductor-on-insulator substrate Oct. 18, 2011
8017472 CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof Sep. 13, 2011
8003458 Methods of manufacturing a semiconductor device with active regions of different heights Aug. 23, 2011
7994017 Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications Aug. 9, 2011
7989298 Transistor having V-shaped embedded stressor Aug. 2, 2011
7981764 Method for fabricating semiconductor device with vertical gate Jul. 19, 2011
7947569 Method for producing a semiconductor including a foreign material layer May. 24, 2011
7939422 Methods of thin film process May. 10, 2011
7939411 Method for fabricating semiconductor device with vertical gate May. 10, 2011
7915131 Semiconductor device and method for fabricating the same Mar. 29, 2011
7906406 Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured Mar. 15, 2011
7898017 Floating-gate memory cell and memory device and electronic system therewith Mar. 1, 2011
7875511 CMOS structure including differential channel stressing layer compositions Jan. 25, 2011

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