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Class Information
Number: 438/429
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Grooved and refilled with deposited dielectric material > And epitaxial semiconductor formation in groove
Description: Process for making electrically isolated laterally spaced semiconductor regions by grooving and refilling with insulative material including a step of epitaxially depositing semiconductive material in the groove.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7608515 |
Diffusion layer for stressed semiconductor devices |
Oct. 27, 2009 |
| 7575968 |
Inverse slope isolation and dual surface orientation integration |
Aug. 18, 2009 |
| 7572705 |
Semiconductor device and method of manufacturing a semiconductor device |
Aug. 11, 2009 |
| 7553742 |
Method(s) of forming a thin layer |
Jun. 30, 2009 |
| 7553740 |
Structure and method for forming a minimum pitch trench-gate FET with heavy body region |
Jun. 30, 2009 |
| 7547605 |
Microelectronic device and a method for its manufacture |
Jun. 16, 2009 |
| 7547610 |
Method of making a semiconductor device comprising isolation trenches inducing different types of strain |
Jun. 16, 2009 |
| 7524751 |
Method for forming contact hole in semiconductor device |
Apr. 28, 2009 |
| 7517771 |
Method for manufacturing semiconductor device having trench |
Apr. 14, 2009 |
| 7507631 |
Epitaxial filled deep trench structures |
Mar. 24, 2009 |
| 7491641 |
Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line |
Feb. 17, 2009 |
| 7439155 |
Isolation techniques for reducing dark current in CMOS image sensors |
Oct. 21, 2008 |
| 7435656 |
Semiconductor device of transistor structure having strained semiconductor layer |
Oct. 14, 2008 |
| 7432605 |
Overlay mark, method for forming the same and application thereof |
Oct. 7, 2008 |
| 7407860 |
Method of fabricating a complementary semiconductor device having a strained channel p-transistor |
Aug. 5, 2008 |
| 7402499 |
Semiconductor device and method of manufacturing the same |
Jul. 22, 2008 |
| 7390710 |
Protection of tunnel dielectric using epitaxial silicon |
Jun. 24, 2008 |
| 7387941 |
Method for fabricating semiconductor device |
Jun. 17, 2008 |
| 7371656 |
Method for forming STI of semiconductor device |
May. 13, 2008 |
| 7368345 |
Flash memory devices and methods of fabricating the same |
May. 6, 2008 |
| 7358144 |
Method for fabricating semiconductor device |
Apr. 15, 2008 |
| 7354826 |
Method for forming memory array bitlines comprising epitaxially grown silicon and related structure |
Apr. 8, 2008 |
| 7351633 |
Method of fabricating semiconductor device using selective epitaxial growth |
Apr. 1, 2008 |
| 7268043 |
Semiconductor device and method of manufacturing the same |
Sep. 11, 2007 |
| 7268058 |
Tri-gate transistors and methods to fabricate same |
Sep. 11, 2007 |
| 7259074 |
Trench isolation method in flash memory device |
Aug. 21, 2007 |
| 7259069 |
Semiconductor device and method of manufacturing the same |
Aug. 21, 2007 |
| 7247533 |
Method of fabricating semiconductor device using selective epitaxial growth |
Jul. 24, 2007 |
| 7244659 |
Integrated circuits and methods of forming a field effect transistor |
Jul. 17, 2007 |
| 7217633 |
Methods for fabricating an STI film of a semiconductor device |
May. 15, 2007 |
| 7217634 |
Methods of forming integrated circuitry |
May. 15, 2007 |
| 7199017 |
Methods of forming semiconductor circuitry |
Apr. 3, 2007 |
| 7186627 |
Method for forming device isolation film of semiconductor device |
Mar. 6, 2007 |
| 7183175 |
Shallow trench isolation structure for strained Si on SiGe |
Feb. 27, 2007 |
| 7169697 |
Semiconductor device and manufacturing method of the same |
Jan. 30, 2007 |
| 7118966 |
Methods of forming conductive lines |
Oct. 10, 2006 |
| 7112495 |
Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
Sep. 26, 2006 |
| 7084043 |
Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor |
Aug. 1, 2006 |
| 7067387 |
Method of manufacturing dielectric isolated silicon structure |
Jun. 27, 2006 |
| 7060596 |
Process for fabricating a single-crystal substrate and integrated circuit comprising such a substrate |
Jun. 13, 2006 |
| 7033907 |
Method for forming isolation layer of semiconductor device |
Apr. 25, 2006 |
| 7029988 |
Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium |
Apr. 18, 2006 |
| 7029989 |
Semiconductor device and method of manufacturing the same |
Apr. 18, 2006 |
| 6979631 |
Methods of forming semiconductor circuitry |
Dec. 27, 2005 |
| 6969665 |
Method of forming an isolation film in a semiconductor device |
Nov. 29, 2005 |
| 6967132 |
Methods of forming semiconductor circuitry |
Nov. 22, 2005 |
| 6919612 |
Biasable isolation regions using epitaxially grown silicon between the isolation regions |
Jul. 19, 2005 |
| 6911367 |
Methods of forming semiconductive materials having flattened surfaces; methods of forming isolation regions; and methods of forming elevated source/drain regions |
Jun. 28, 2005 |
| 6893940 |
Method of manufacturing semiconductor device |
May. 17, 2005 |
| 6890832 |
Radiation hardening method for shallow trench isolation in CMOS |
May. 10, 2005 |
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