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Class Information
Number: 438/421
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Having air-gap dielectric (e.g., groove, etc.)
Description: Process for making an electrically isolated laterally spaced semiconductor structure resulting in laterally spaced semiconductive regions separated at least in part by a recessed air-gap feature relative to the surrounding surface (e.g., groove, trench, notch, etc.).










Sub-classes under this class:

Class Number Class Name Patents
438/422 Enclosed cavity 276


Patents under this class:
1 2 3 4 5 6 7 8

Patent Number Title Of Patent Date Issued
6472285 Method for fabricating high-Q inductance device in monolithic technology Oct. 29, 2002
6472257 High quality factor, integrated inductor and production method thereof Oct. 29, 2002
6468877 Method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner Oct. 22, 2002
6451669 Method of forming insulated metal interconnections in integrated circuits Sep. 17, 2002
6452267 Selective flip chip underfill processing for high speed signal isolation Sep. 17, 2002
6426267 Method for fabricating high-Q inductance device in monolithic technology Jul. 30, 2002
6413827 Low dielectric constant shallow trench isolation Jul. 2, 2002
6406992 Fabrication method for a dual damascene structure Jun. 18, 2002
6406975 Method for fabricating an air gap shallow trench isolation (STI) structure Jun. 18, 2002
6403430 Semiconductor structure having more usable substrate area and method for forming same Jun. 11, 2002
6376330 Dielectric having an air gap formed between closely spaced interconnect lines Apr. 23, 2002
6376286 Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer Apr. 23, 2002
6368939 Multilevel interconnection structure having an air gap between interconnects Apr. 9, 2002
6369430 Method of preventing two neighboring contacts from a short-circuit caused by a void between them and device having the same Apr. 9, 2002
6365918 Method and device for interconnected radio frequency power SiC field effect transistors Apr. 2, 2002
6365489 Creation of subresolution features via flow characteristics Apr. 2, 2002
6362072 Process for realizing trench structures Mar. 26, 2002
6362073 Method for forming semiconductor device having low parasite capacitance using air gap and self-aligned contact plug Mar. 26, 2002
6355535 Method and structure of manufacturing a high-Q inductor with an air trench Mar. 12, 2002
6342427 Method for forming micro cavity Jan. 29, 2002
6342430 Trench isolation for micromechanical devices Jan. 29, 2002
6329279 Method of fabricating metal interconnect structure having outer air spacer Dec. 11, 2001
6326229 Process for manufacturing integrated semiconductor devices comprising a chemoresistive gas microsensor Dec. 4, 2001
6316347 Air gap semiconductor structure and method of manufacture Nov. 13, 2001
6313006 Method of field implantation Nov. 6, 2001
6313046 Method of forming materials between conductive electrical components, and insulating materials Nov. 6, 2001
6309946 Reduced RC delay between adjacent substrate wiring lines Oct. 30, 2001
6306753 Feasible, gas-dielectric interconnect process Oct. 23, 2001
6306754 Method for forming wiring with extremely low parasitic capacitance Oct. 23, 2001
6303464 Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer Oct. 16, 2001
6297125 Air-bridge integration scheme for reducing interconnect delay Oct. 2, 2001
6297145 Method of forming a wiring layer having an air bridge construction Oct. 2, 2001
6277728 Multilevel interconnect structure with low-k dielectric and method of fabricating the structure Aug. 21, 2001
6277705 Method for fabricating an air-gap with a hard mask Aug. 21, 2001
6268276 Area array air gap structure for intermetal dielectric application Jul. 31, 2001
6268262 Method for forming air bridges Jul. 31, 2001
6268261 Microprocessor having air as a dielectric and encapsulated lines and process for manufacture Jul. 31, 2001
6261942 Dual metal-oxide layer as air bridge Jul. 17, 2001
6258724 Low dielectric constant dielectric films and process for making the same Jul. 10, 2001
6251798 Formation of air gap structures for inter-metal dielectric application Jun. 26, 2001
6248622 Fabrication method for ultra short channel device comprising self-aligned landing pad Jun. 19, 2001
6245658 Method of forming low dielectric semiconductor device with rigid, metal silicide lined interconnection system Jun. 12, 2001
6245637 STI process Jun. 12, 2001
6242363 Method of etching a wafer layer using a sacrificial wall to form vertical sidewall Jun. 5, 2001
6228763 Method of fabricating metal interconnect having inner air spacer May. 8, 2001
6228756 Method of manufacturing inter-metal dielectric layer May. 8, 2001
6221754 Method of fabricating a plug Apr. 24, 2001
6218685 Semiconductor device and method for fabricating the same Apr. 17, 2001
6214719 Method of implementing air-gap technology for low capacitance ILD in the damascene scheme Apr. 10, 2001
6204200 Process scheme to form controlled airgaps between interconnect lines to reduce capacitance Mar. 20, 2001

1 2 3 4 5 6 7 8










 
 
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