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Class Information
Number: 438/405
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Total dielectric isolation > And separate partially isolated semiconductor regions
Description: Process for making a total dielectric isolation semiconductor structure additionally having laterally spaced semiconductor regions at least one of which is fully electrically isolated from other laterally spaced semiconductive regions and at least one other region which is partially electrically isolated from another laterally spaced semiconductive region.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622359 |
Method for manufacturing semiconductor device |
Nov. 24, 2009 |
| 7579254 |
Process for realizing an integrated electronic circuit with two active layer portions having different crystal orientations |
Aug. 25, 2009 |
| 7560389 |
Method for fabricating semiconductor element |
Jul. 14, 2009 |
| 7553741 |
Manufacturing method of semiconductor device |
Jun. 30, 2009 |
| 7534723 |
Methods of forming fine patterns, and methods of forming trench isolation layers using the same |
May. 19, 2009 |
| 7507634 |
Method for fabricating a localize SOI in bulk silicon substrate including changing first trenches formed in the substrate into unclosed empty space by applying heat treatment |
Mar. 24, 2009 |
| 7485965 |
Through via in ultra high resistivity wafer and related methods |
Feb. 3, 2009 |
| 7446420 |
Through silicon via chip stack package capable of facilitating chip selection during device operation |
Nov. 4, 2008 |
| 7420202 |
Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device |
Sep. 2, 2008 |
| 7409660 |
Method and end cell library for avoiding substrate noise in an integrated circuit |
Aug. 5, 2008 |
| 7381627 |
Dual wired integrated circuit chips |
Jun. 3, 2008 |
| 7354812 |
Multiple-depth STI trenches in integrated circuit fabrication |
Apr. 8, 2008 |
| 7348251 |
Modulated trigger device |
Mar. 25, 2008 |
| 7285477 |
Dual wired integrated circuit chips |
Oct. 23, 2007 |
| 7262109 |
Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor |
Aug. 28, 2007 |
| 7229892 |
Semiconductor device and method of manufacturing the same |
Jun. 12, 2007 |
| 7220655 |
Method of forming an alignment mark on a wafer, and a wafer comprising same |
May. 22, 2007 |
| 7217604 |
Structure and method for thin box SOI device |
May. 15, 2007 |
| 7199017 |
Methods of forming semiconductor circuitry |
Apr. 3, 2007 |
| 7166519 |
Method for isolating semiconductor devices with use of shallow trench isolation method |
Jan. 23, 2007 |
| 7148511 |
Active matrix substrate, electro-optical device, electronic device, and method for manufacturing an active matrix substrate |
Dec. 12, 2006 |
| 7144764 |
Method of manufacturing semiconductor device having trench isolation |
Dec. 5, 2006 |
| 7132347 |
Semiconductor device with trench structure and method for manufacturing the same |
Nov. 7, 2006 |
| 7118990 |
Methods for making large dimension, flexible piezoelectric ceramic tapes |
Oct. 10, 2006 |
| 7115463 |
Patterning SOI with silicon mask to create box at different depths |
Oct. 3, 2006 |
| 7105389 |
Method of manufacturing semiconductor device having impurity region under isolation region |
Sep. 12, 2006 |
| 7053451 |
Semiconductor device having impurity region under isolation region |
May. 30, 2006 |
| 7045437 |
Method for fabricating shallow trenches |
May. 16, 2006 |
| 7037770 |
Method of manufacturing strained dislocation-free channels for CMOS |
May. 2, 2006 |
| 7022565 |
Method of fabricating a trench capacitor of a mixed mode integrated circuit |
Apr. 4, 2006 |
| 7018904 |
Semiconductor chip having multiple functional blocks integrated in a single chip and method for fabricating the same |
Mar. 28, 2006 |
| 6949443 |
High performance semiconductor devices fabricated with strain-induced processes and methods for making same |
Sep. 27, 2005 |
| 6949444 |
High-frequency line |
Sep. 27, 2005 |
| 6946338 |
Method for manufacturing semiconductor device |
Sep. 20, 2005 |
| 6943088 |
Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding |
Sep. 13, 2005 |
| 6884667 |
Field effect transistor with stressed channel and method for making same |
Apr. 26, 2005 |
| 6855617 |
Method of filling intervals and fabricating shallow trench isolation structures |
Feb. 15, 2005 |
| 6822325 |
Isolating temperature sensitive components from heat sources in integrated circuits |
Nov. 23, 2004 |
| 6777290 |
Global column select structure for accessing a memory |
Aug. 17, 2004 |
| 6709908 |
Methods for making semiconductor devices |
Mar. 23, 2004 |
| 6706615 |
Method of manufacturing a transistor |
Mar. 16, 2004 |
| 6682985 |
Semiconductor device and manufacturing method thereof |
Jan. 27, 2004 |
| 6682990 |
Separation method of semiconductor layer and production method of solar cell |
Jan. 27, 2004 |
| 6660616 |
P-i-n transit time silicon-on-insulator device |
Dec. 9, 2003 |
| 6656806 |
SOI structure and method of producing same |
Dec. 2, 2003 |
| 6656775 |
Semiconductor substrate, semiconductor device, and manufacturing method thereof |
Dec. 2, 2003 |
| 6635550 |
Semiconductor on insulator device architecture and method of construction |
Oct. 21, 2003 |
| 6627511 |
Reduced stress isolation for SOI devices and a method for fabricating |
Sep. 30, 2003 |
| 6627512 |
Method of manufacturing a semiconductor device |
Sep. 30, 2003 |
| 6620654 |
Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure |
Sep. 16, 2003 |
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