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Class Information
Number: 438/401
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure > Having substrate registration feature (e.g., alignment mark)
Description: Process wherein the process of forming electrical isolation utilizes an alignment feature formed on the semiconductive substrate or forms an alignment feature for subsequent use.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6046094 Method of forming wafer alignment patterns Apr. 4, 2000
6043133 Method of photo alignment for shallow trench isolation chemical-mechanical polishing Mar. 28, 2000
6043134 Semiconductor wafer alignment processes Mar. 28, 2000
6037236 Regeneration of alignment marks after shallow trench isolation with chemical mechanical polishing Mar. 14, 2000
6030880 Alignment feature that avoids comet tail formation in spin-on materials and production method therefor Feb. 29, 2000
6023104 LED array alignment mark, method and mask for forming same, and LED array alignment method Feb. 8, 2000
6022650 Overlay target for precise positional determination Feb. 8, 2000
6020249 Method for photo alignment after CMP planarization Feb. 1, 2000
6015750 Method for improving visibility of alignment target in semiconductor processing Jan. 18, 2000
6015744 Method of manufacturing a shallow trench isolation alignment mark Jan. 18, 2000
6010945 Method for preventing alignment marks from disappearing after chemical mechanical polishing Jan. 4, 2000
6008060 Detecting registration marks with a low energy electron beam Dec. 28, 1999
6004405 Wafer having a laser mark on chamfered edge Dec. 21, 1999
6005294 Method of arranging alignment marks Dec. 21, 1999
6001703 Method of forming a fiducial for aligning an integrated circuit die Dec. 14, 1999
5998226 Method and system for alignment of openings in semiconductor fabrication Dec. 7, 1999
5994198 Fabrication method for fully landing subminimum features on minimum width lines Nov. 30, 1999
5981352 Consistent alignment mark profiles on semiconductor wafers using fine grain tungsten protective layer Nov. 9, 1999
5982044 Alignment pattern and algorithm for photolithographic alignment marks on semiconductor substrates Nov. 9, 1999
5972772 Electron beam drawing process Oct. 26, 1999
5972234 Debris-free wafer marking method Oct. 26, 1999
5966613 Consistent alignment mark profiles on semiconductor wafers using metal organic chemical vapor deposition titanium nitride protective Oct. 12, 1999
5966614 Silicon nitride-free isolation methods for integrated circuits Oct. 12, 1999
5963816 Method for making shallow trench marks Oct. 5, 1999
5960296 Method for aligning the device layers in a semiconductor device Sep. 28, 1999
5960286 Method of manufacturing power semiconductor devices Sep. 28, 1999
5956596 Method of forming and cleaning a laser marking region at a round zone of a semiconductor wafer Sep. 21, 1999
5950093 Method for aligning shallow trench isolation Sep. 7, 1999
5946583 Method for preventing alignment marks from disappearing after chemical mechanical polishing Aug. 31, 1999
5943588 Method of manufacturing and using alignment marks Aug. 24, 1999
5943591 Integrated circuit scribe line structures and methods for making same Aug. 24, 1999
5943587 Method for making offset alignment marks Aug. 24, 1999
5943586 LED array alignment mark, method and mask for forming same, and LED array alignment method Aug. 24, 1999
5940706 Process for preventing misalignment in split-gate flash memory cell Aug. 17, 1999
5936311 Integrated circuit alignment marks distributed throughout a surface metal line Aug. 10, 1999
5933744 Alignment method for used in chemical mechanical polishing process Aug. 3, 1999
5933743 Method of improving alignment signal strength by reducing refraction index at interface of materials in semiconductors Aug. 3, 1999
5925937 Semiconductor wafer, wafer alignment patterns Jul. 20, 1999
5926697 Method of forming a moisture guard ring for integrated circuit applications Jul. 20, 1999
5926720 Consistent alignment mark profiles on semiconductor wafers using PVD shadowing Jul. 20, 1999
5923990 Process for positioning a mask relative to a workpiece Jul. 13, 1999
5913113 Method for fabricating a thin film transistor of a liquid crystal display device Jun. 15, 1999
5911108 Method for protecting an alignment mark on a semiconductor substrate during chemical mechanical polishing and the resulting structure Jun. 8, 1999
5904563 Method for metal alignment mark generation May. 18, 1999
5898227 Alignment targets having enhanced contrast Apr. 27, 1999
5895251 Method for forming a triple-well in a semiconductor device Apr. 20, 1999
5893744 Method of forming a zero layer mark for alignment in integrated circuit manufacturing process employing shallow trench isolation Apr. 13, 1999
5889335 Semiconductor device and method of manufacturing the same Mar. 30, 1999
5882980 Process of forming bipolar alignment mark for semiconductor Mar. 16, 1999
5877036 Overlay measuring method using correlation function Mar. 2, 1999

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