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Class Information
Number: 438/400
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure
Description: Process for making partial or total electrical isolation means serving to minimize electrical current flow between laterally adjoining semiconductive regions of the substrate.

Sub-classes under this class:

Class Number Class Name Patents
438/402 And gettering of substrate 97
438/454 Field plate electrode 149
438/424 Grooved and refilled with deposited dielectric material 2,061
438/421 Having air-gap dielectric (e.g., groove, etc.) 393
438/403 Having semi-insulating component 117
438/401 Having substrate registration feature (e.g., alignment mark) 801
438/423 Implanting to form insulator 224
438/414 Isolation by pn junction only 65
438/439 Recessed oxide by localized oxidation (i.e., locos) 357
438/404 Total dielectric isolation 363

Patents under this class:
1 2 3 4 5 6 7

Patent Number Title Of Patent Date Issued
5034343 Manufacturing ultra-thin wafer using a handle wafer Jul. 23, 1991
5032538 Semiconductor embedded layer technology utilizing selective epitaxial growth methods Jul. 16, 1991
RE33622 Integrated circuits having stepped dielectric regions Jun. 25, 1991
4968640 Isolation structures for integrated circuits Nov. 6, 1990
4885261 Method for isolating a semiconductor element Dec. 5, 1989
4818235 Isolation structures for integrated circuits Apr. 4, 1989
4762805 Nitride-less process for VLSI circuit device isolation Aug. 9, 1988
4702000 Technique for elimination of polysilicon stringers in direct moat field oxide structure Oct. 27, 1987
4676869 Integrated circuits having stepped dielectric regions Jun. 30, 1987
4584761 Integrated circuit chip processing techniques and integrated chip produced thereby Apr. 29, 1986
4566914 Method of forming localized epitaxy and devices formed therein Jan. 28, 1986
4535220 Integrated circuits Aug. 13, 1985
4462847 Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition Jul. 31, 1984
4459325 Semiconductor device and method for manufacturing the same Jul. 10, 1984
4441941 Method for manufacturing a semiconductor device employing element isolation using insulating materials Apr. 10, 1984
4400411 Technique of silicon epitaxial refill Aug. 23, 1983
4395433 Method for manufacturing a semiconductor device having regions of different thermal conductivity Jul. 26, 1983
4170500 Process for forming field dielectric regions in semiconductor structures without encroaching on device regions Oct. 9, 1979
4101350 Self-aligned epitaxial method for the fabrication of semiconductor devices Jul. 18, 1978
4090289 Method of fabrication for field effect transistors (FETs) having a common channel stopper and FET channel doping with the channel stopper doping self-aligned to the dielectric isolation betwee May. 23, 1978

1 2 3 4 5 6 7

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