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Class Information
Number: 438/400
Name: Semiconductor device manufacturing: process > Formation of electrically isolated lateral semiconductive structure
Description: Process for making partial or total electrical isolation means serving to minimize electrical current flow between laterally adjoining semiconductive regions of the substrate.










Sub-classes under this class:

Class Number Class Name Patents
438/402 And gettering of substrate 97
438/454 Field plate electrode 149
438/424 Grooved and refilled with deposited dielectric material 2,061
438/421 Having air-gap dielectric (e.g., groove, etc.) 393
438/403 Having semi-insulating component 117
438/401 Having substrate registration feature (e.g., alignment mark) 801
438/423 Implanting to form insulator 224
438/414 Isolation by pn junction only 65
438/439 Recessed oxide by localized oxidation (i.e., locos) 357
438/404 Total dielectric isolation 363


Patents under this class:
1 2 3 4 5 6 7

Patent Number Title Of Patent Date Issued
6489215 Method of making insulator for electrical structures Dec. 3, 2002
6486067 Method for improving the electrical isolation between the contact and gate in a self-aligned contact MOSFET device structure Nov. 26, 2002
6479880 Floating gate isolation device Nov. 12, 2002
6468884 Method of forming silicon-contained crystal thin film Oct. 22, 2002
6465323 Method for forming semiconductor integrated circuit microelectronic fabrication having multiple gate dielectric layers with multiple thicknesses Oct. 15, 2002
6461932 Semiconductor trench isolation process that utilizes smoothening layer Oct. 8, 2002
6420769 Method for manufacturing electronic devices having HV transistors and LV transistors with salicided junctions Jul. 16, 2002
6394638 Trench isolation for active areas and first level conductors May. 28, 2002
6391729 Shallow trench isolation formation to eliminate poly stringer with controlled step height and corner rounding May. 21, 2002
6388268 Semiconducting YBCO device and superconducting YBCO device locally converted by AFM tip and manufacturing methods therefor May. 14, 2002
6372599 Semiconductor device and method of manufacturing the same Apr. 16, 2002
6362113 Method of forming pattern Mar. 26, 2002
6352906 Nitridization of STI sidewalls Mar. 5, 2002
6342427 Method for forming micro cavity Jan. 29, 2002
6339241 Structure and process for 6F2 trench capacitor DRAM cell with vertical MOSFET and 3F bitline pitch Jan. 15, 2002
6331469 Trench isolation structure, semiconductor device having the same, and trench isolation method Dec. 18, 2001
6309943 Precision marking and singulation method Oct. 30, 2001
6309942 STI punch-through defects and stress reduction by high temperature oxide reflow process Oct. 30, 2001
6303733 Poly(arylene ether) homopolymer compositions and methods of manufacture thereof Oct. 16, 2001
6303465 Method of forming low leakage current borderless contact Oct. 16, 2001
6291308 Mask ROM fabrication method Sep. 18, 2001
6281119 Method for making contact with a semiconductor layer and semiconductor structure having a plurality of layers Aug. 28, 2001
6274455 Method for isolating semiconductor device Aug. 14, 2001
6265281 Method for forming dielectric within a recess Jul. 24, 2001
6258692 Method forming shallow trench isolation Jul. 10, 2001
6255188 Method of removing a polysilicon buffer using an etching selectivity solution Jul. 3, 2001
6251798 Formation of air gap structures for inter-metal dielectric application Jun. 26, 2001
6251751 Bulk and strained silicon on insulator using local selective oxidation Jun. 26, 2001
6251744 Implant method to improve characteristics of high voltage isolation and high voltage breakdown Jun. 26, 2001
6248641 Method of fabricating shallow trench isolation Jun. 19, 2001
6242317 High quality isolation structure formation Jun. 5, 2001
6238997 Method of fabricating shallow trench isolation May. 29, 2001
6238996 Method of forming a shallow trench isolation structure May. 29, 2001
6235606 Method of fabricating shallow trench isolation May. 22, 2001
6235609 Method for forming isolation areas with improved isolation oxide May. 22, 2001
6228782 Core field isolation for a NAND flash memory May. 8, 2001
6228742 Method of fabricating shallow trench isolation structure May. 8, 2001
6228741 Method for trench isolation of semiconductor devices May. 8, 2001
6225186 Method for fabricating LOCOS isolation May. 1, 2001
6223331 Semiconductor circuit design method for employing spacing constraints and circuits thereof Apr. 24, 2001
6221731 Process of fabricating buried diffusion junction Apr. 24, 2001
6214690 Method of forming a semiconductor device having integrated electrode and isolation region formation Apr. 10, 2001
6214691 Method for forming shallow trench isolation Apr. 10, 2001
6211037 Locos processes Apr. 3, 2001
6204147 Method of manufacturing shallow trench isolation Mar. 20, 2001
6190996 Method of making an insulator for electrical structures Feb. 20, 2001
6190995 Method of fabricating shallow trench isolation structure Feb. 20, 2001
6177329 Integrated circuit structures having gas pockets and method for forming integrated circuit structures having gas pockets Jan. 23, 2001
6156620 Isolation trench in semiconductor substrate with nitrogen-containing barrier region, and process for forming same Dec. 5, 2000
6153493 Method of manufacturing semiconductor device Nov. 28, 2000

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