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Class Information
Number: 438/388
Name: Semiconductor device manufacturing: process > Making passive device (e.g., resistor, capacitor, etc.) > Trench capacitor > With epitaxial layer formed over the trench
Description: Process for making a trench capacitor including a step of forming an epitaxial semiconductive layer over the trench region.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6576525 |
Damascene capacitor having a recessed plate |
Jun. 10, 2003 |
| 6573136 |
Isolating a vertical gate contact structure |
Jun. 3, 2003 |
| 6566177 |
Silicon-on-insulator vertical array device trench capacitor DRAM |
May. 20, 2003 |
| 6566193 |
Method for producing a cell of a semiconductor memory |
May. 20, 2003 |
| 6537873 |
Integrated circuit comprising a memory cell of the DRAM type, and fabrication process |
Mar. 25, 2003 |
| 6509226 |
Process for protecting array top oxide |
Jan. 21, 2003 |
| 6500707 |
Method for manufacturing a trench capacitor of a memory cell of a semiconductor memory |
Dec. 31, 2002 |
| 6495294 |
Method for manufacturing semiconductor substrate having an epitaxial film in the trench |
Dec. 17, 2002 |
| 6432792 |
Substrate and method for manufacturing the same |
Aug. 13, 2002 |
| 6420756 |
Semiconductor device and method |
Jul. 16, 2002 |
| 6413830 |
Dynamic random access memory |
Jul. 2, 2002 |
| 6372573 |
Self-aligned trench capacitor capping process for high density DRAM cells |
Apr. 16, 2002 |
| 6362040 |
Reduction of orientation dependent oxidation for vertical sidewalls of semiconductor substrates |
Mar. 26, 2002 |
| 6326275 |
DRAM cell with vertical CMOS transistor |
Dec. 4, 2001 |
| 6303456 |
Method for making a finger capacitor with tuneable dielectric constant |
Oct. 16, 2001 |
| 6284593 |
Method for shallow trench isolated, contacted well, vertical MOSFET DRAM |
Sep. 4, 2001 |
| 6284618 |
Method of making a semiconductor device having a conductor pattern side face provided with a separate conductive sidewall |
Sep. 4, 2001 |
| 6245612 |
Method for making the bottom electrode of a capacitor |
Jun. 12, 2001 |
| 6232171 |
Technique of bottle-shaped deep trench formation |
May. 15, 2001 |
| 6207494 |
Isolation collar nitride liner for DRAM process improvement |
Mar. 27, 2001 |
| 6177289 |
Lateral trench optical detectors |
Jan. 23, 2001 |
| 6169008 |
High Q inductor and its forming method |
Jan. 2, 2001 |
| 6093614 |
Memory cell structure and fabrication |
Jul. 25, 2000 |
| 6087214 |
Arrangement and method for DRAM cell using shallow trench isolation |
Jul. 11, 2000 |
| 6064085 |
DRAM cell with a multiple fin-shaped structure capacitor |
May. 16, 2000 |
| 6010963 |
Global planarization using SOG and CMP |
Jan. 4, 2000 |
| 5972105 |
Method of fabricating semiconductor device |
Oct. 26, 1999 |
| 5923971 |
Reliable low resistance strap for trench storage DRAM cell using selective epitaxy |
Jul. 13, 1999 |
| 5913125 |
Method of controlling stress in a film |
Jun. 15, 1999 |
| 5893735 |
Three-dimensional device layout with sub-groundrule features |
Apr. 13, 1999 |
| 5843820 |
Method of fabricating a new dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor |
Dec. 1, 1998 |
| 5627092 |
Deep trench dram process on SOI for low leakage DRAM cell |
May. 6, 1997 |
| 5371032 |
Process for production of a semiconductor device having a cladding layer |
Dec. 6, 1994 |
| 5336629 |
Folder Bitline DRAM having access transistors stacked above trench storage capacitors, each such transistor employing a planar semiconductor body which spans adjacent capacitors |
Aug. 9, 1994 |
| 5013679 |
Cell capacitor of a dynamic random access memory and a method of manufacturing the same |
May. 7, 1991 |
| 4843025 |
Method of fabricating trench cell capacitors on a semocondcutor substrate |
Jun. 27, 1989 |
| 4656054 |
Method of manufacturing a semiconductor device involving a capacitor |
Apr. 7, 1987 |
| 4645564 |
Method of manufacturing semiconductor device with MIS capacitor |
Feb. 24, 1987 |
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