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Class Information
Number: 438/377
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Self-aligned > Dopant implantation or diffusion > Simultaneous introduction of plural dopants > Plural doping steps > Through same mask opening
Description: Process wherein plural doping steps are affected through the same opening in a dopant masking layer.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8629026 Source tip optimization for high voltage transistor devices Jan. 14, 2014
8461005 Method of manufacturing doping patterns Jun. 11, 2013
8377320 Method of forming an undercut microstructure Feb. 19, 2013
7927969 Cleaning of photolithography masks Apr. 19, 2011
7927955 Adjustable bipolar transistors formed using a CMOS process Apr. 19, 2011
7902051 Method for fabrication of single crystal diodes for resistive memories Mar. 8, 2011
7863170 Semiconductor body comprising a transistor structure and method for producing a transistor structure Jan. 4, 2011
7842525 Method and apparatus for personalization of semiconductor Nov. 30, 2010
7824973 Method of forming a semiconductor device and semiconductor device thereof Nov. 2, 2010
7807555 Method of forming the NDMOS device body with the reduced number of masks Oct. 5, 2010
7598133 Semiconductor memory device and a method of manufacturing the same Oct. 6, 2009
7550355 Low-leakage transistor and manufacturing method thereof Jun. 23, 2009
7488663 Semiconductor article and method for manufacturing with reduced base resistance Feb. 10, 2009
7303949 High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Dec. 4, 2007
7241660 Manufacturing method of semiconductor device Jul. 10, 2007
7067383 Method of making bipolar transistors and resulting product Jun. 27, 2006
7037748 CMOS image sensor and method for manufacturing the same May. 2, 2006
7033903 Method and apparatus for forming patterned photoresist layer Apr. 25, 2006
6890826 Method of making bipolar transistor with integrated base contact and field plate May. 10, 2005
6872645 Methods of positioning and/or orienting nanostructures Mar. 29, 2005
6835606 Low temperature polysilicon thin film transistor and method of forming polysilicon layer of same Dec. 28, 2004
6432790 Method of manufacturing photomask, photomask, and method of manufacturing semiconductor integrated circuit device Aug. 13, 2002
6337252 Semiconductor device manufacturing method Jan. 8, 2002
6329260 Analog-to-digital converter and method of fabrication Dec. 11, 2001
6251739 Integrated circuit, components thereof and manufacturing method Jun. 26, 2001
6180442 Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method Jan. 30, 2001
6077746 Using p-type halo implant as ROM cell isolation in flat-cell mask ROM process Jun. 20, 2000
6043130 Process for forming bipolar transistor compatible with CMOS utilizing tilted ion implanted base Mar. 28, 2000
6001700 Method and mask structure for self-aligning ion implanting to form various device structures Dec. 14, 1999
5885880 Bipolar transistor device and method for manufacturing the same Mar. 23, 1999
5846858 SOI-BiCMOS method Dec. 8, 1998
5837590 Isolated vertical PNP transistor without required buried layer Nov. 17, 1998
5726922 Assembly for removably connecting data storage devices Mar. 10, 1998
5688709 Method for forming composite trench-fin capacitors for DRAMS Nov. 18, 1997
5593906 Method of processing a polysilicon film on a single-crystal silicon substrate Jan. 14, 1997
5589409 Fabrication of bipolar transistors with improved output current-voltage characteristics Dec. 31, 1996
5569613 Method of making bipolar junction transistor Oct. 29, 1996
5336632 Method for manufacturing capacitor and bipolar transistor Aug. 9, 1994
5296388 Fabrication method for semiconductor devices Mar. 22, 1994
5254485 Method for manufacturing bipolar semiconductor device Oct. 19, 1993
5252517 Method of conductor isolation from a conductive contact plug Oct. 12, 1993
5091321 Method for making an NPN transistor with controlled base width compatible with making a Bi-MOS integrated circuit Feb. 25, 1992
5077227 Semiconductor device and method for fabricating the same Dec. 31, 1991
5071780 Reverse self-aligned transistor integrated circuit Dec. 10, 1991
5064774 Self-aligned bipolar transistor process Nov. 12, 1991
5019523 Process for making polysilicon contacts to IC mesas May. 28, 1991
4952521 Process for fabricating a semiconductor device with selective growth of a metal silicide Aug. 28, 1990
4898837 Method of fabricating a semiconductor integrated circuit Feb. 6, 1990
4824794 Method for fabricating a bipolar transistor having self aligned base and emitter Apr. 25, 1989
4804634 Integrated circuit lateral transistor structure Feb. 14, 1989

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