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Class Information
Number: 438/376
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Self-aligned > Dopant implantation or diffusion > Simultaneous introduction of plural dopants > Plural doping steps > Single dopant forming regions of different depth or concentrations
Description: Process wherein the plural doping steps form regions which differ in amount of impurity or the distance the impurity has to travel inwardly from the surface.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615458 |
Activation of CMOS source/drain extensions by ultra-high temperature anneals |
Nov. 10, 2009 |
| 7550355 |
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Jun. 23, 2009 |
| 7495264 |
Semiconductor device with high dielectric constant insulating film and manufacturing method for the same |
Feb. 24, 2009 |
| 7384853 |
Method of performing salicide processes on MOS transistors |
Jun. 10, 2008 |
| 7288829 |
Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide |
Oct. 30, 2007 |
| 7271070 |
Method for producing transistors |
Sep. 18, 2007 |
| 7195986 |
Microfluidic device with controlled substrate conductivity |
Mar. 27, 2007 |
| 6995068 |
Double-implant high performance varactor and method for manufacturing same |
Feb. 7, 2006 |
| 6893934 |
Bipolar transistor device having phosphorous |
May. 17, 2005 |
| 6716712 |
Process for producing two differently doped adjacent regions in an integrated semiconductor |
Apr. 6, 2004 |
| 6337252 |
Semiconductor device manufacturing method |
Jan. 8, 2002 |
| 6329257 |
Method for laterally peaked source doping profiles for better erase control in flash memory devices |
Dec. 11, 2001 |
| 6309940 |
Latch-up resistant CMOS structure |
Oct. 30, 2001 |
| 6225180 |
Semiconductor device and method of manufacturing the same |
May. 1, 2001 |
| 6215151 |
Methods of forming integrated circuitry and integrated circuitry |
Apr. 10, 2001 |
| 6146953 |
Fabrication method for mosfet device |
Nov. 14, 2000 |
| 6043130 |
Process for forming bipolar transistor compatible with CMOS utilizing tilted ion implanted base |
Mar. 28, 2000 |
| 5976921 |
Method for manufacturing electrostatic discharge protection (ESD) and BiCMOS |
Nov. 2, 1999 |
| 5885880 |
Bipolar transistor device and method for manufacturing the same |
Mar. 23, 1999 |
| 5850242 |
Recording head and recording apparatus and method of manufacturing same |
Dec. 15, 1998 |
| 5780329 |
Process for fabricating a moderate-depth diffused emitter bipolar transistor in a BICMOS device without using an additional mask |
Jul. 14, 1998 |
| 5756387 |
Method for forming zener diode with high time stability and low noise |
May. 26, 1998 |
| 5700730 |
Semiconductor processing method of providing dopant impurity into a semiconductor substrate |
Dec. 23, 1997 |
| 5593905 |
Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link |
Jan. 14, 1997 |
| 5569612 |
Process for manufacturing a bipolar power transistor having a high breakdown voltage |
Oct. 29, 1996 |
| 5496746 |
Method for fabricating a bipolar junction transistor exhibiting improved beta and punch-through characteristics |
Mar. 5, 1996 |
| 5453387 |
Fabrication method of semiconductor device with neighboring n- and p-type regions |
Sep. 26, 1995 |
| 5279976 |
Method for fabricating a semiconductor device having a shallow doped region |
Jan. 18, 1994 |
| 5137840 |
Vertical bipolar transistor with recessed epitaxially grown intrinsic base region |
Aug. 11, 1992 |
| 5128272 |
Self-aligned planar monolithic integrated circuit vertical transistor process |
Jul. 7, 1992 |
| 5098638 |
Method of manufacturing a semiconductor device |
Mar. 24, 1992 |
| 5064774 |
Self-aligned bipolar transistor process |
Nov. 12, 1991 |
| 5039624 |
Method of manufacturing a bipolar transistor |
Aug. 13, 1991 |
| 5023192 |
Method of manufacturing a bipolar transistor |
Jun. 11, 1991 |
| 5019523 |
Process for making polysilicon contacts to IC mesas |
May. 28, 1991 |
| 5010026 |
Process for making bipolar transistor |
Apr. 23, 1991 |
| 4946798 |
Semiconductor integrated circuit fabrication method |
Aug. 7, 1990 |
| 4902640 |
High speed double polycide bipolar/CMOS integrated circuit process |
Feb. 20, 1990 |
| 4849364 |
Semiconductor devices |
Jul. 18, 1989 |
| 4830972 |
Method of manufacturing bipolar transistor |
May. 16, 1989 |
| 4812417 |
Method of making self aligned external and active base regions in I.C. processing |
Mar. 14, 1989 |
| 4801556 |
Self-aligned bipolar fabrication process |
Jan. 31, 1989 |
| 4746623 |
Method of making bipolar semiconductor device with wall spacer |
May. 24, 1988 |
| 4669179 |
Integrated circuit fabrication process for forming a bipolar transistor having extrinsic base regions |
Jun. 2, 1987 |
| 4662062 |
Method for making bipolar transistor having a graft-base configuration |
May. 5, 1987 |
| 4545114 |
Method of producing semiconductor device |
Oct. 8, 1985 |
| 4536950 |
Method for making semiconductor device |
Aug. 27, 1985 |
| 4531282 |
Bipolar transistors having vertically arrayed collector-base-emitter with novel polycrystalline base electrode surrounding island emitter and method of making same |
Jul. 30, 1985 |
| 4505766 |
Method of fabricating a semiconductor device utilizing simultaneous outdiffusion and epitaxial deposition |
Mar. 19, 1985 |
| 4499657 |
Method of making a semiconductor device having protected edges |
Feb. 19, 1985 |
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