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Class Information
Number: 438/375
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Self-aligned > Dopant implantation or diffusion > Simultaneous introduction of plural dopants > Plural doping steps > Forming partially overlapping regions
Description: Process wherein the plural doping steps are affected upon localized areas which lap over each other in part.










Patents under this class:
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Patent Number Title Of Patent Date Issued
4874717 Semiconductor circuit containing integrated bipolar and MOS transistors on a chip and method of producing same Oct. 17, 1989
4806499 Method of manufacturing Bi-CMOS semiconductor IC devices using dopant rediffusion Feb. 21, 1989
4780425 Method of making a bipolar transistor with double diffused isolation regions Oct. 25, 1988
4772567 Method of producing a semiconductor integrated circuit BI-MOS device Sep. 20, 1988
4745080 Method of making a self-aligned bipolar transistor with composite masking May. 17, 1988
4734382 BiCMOS process having narrow bipolar emitter and implanted aluminum isolation Mar. 29, 1988
4675983 Method of making a semiconductor including forming graft/extrinsic and intrinsic base regions Jun. 30, 1987
4667393 Method for the manufacture of semiconductor devices with planar junctions having a variable charge concentration and a very high breakdown voltage May. 26, 1987
4641416 Method of making an integrated circuit structure with self-aligned oxidation to isolate extrinsic base from emitter Feb. 10, 1987
4640721 Method of forming bipolar transistors with graft base regions Feb. 3, 1987
4531282 Bipolar transistors having vertically arrayed collector-base-emitter with novel polycrystalline base electrode surrounding island emitter and method of making same Jul. 30, 1985
4510676 Method of fabricating a lateral PNP transistor Apr. 16, 1985
4477965 Process for manufacturing a monolithic integrated solid-state circuit comprising at least one bipolar planar transistor Oct. 23, 1984
4446611 Method of making a saturation-limited bipolar transistor device May. 8, 1984
4418469 Method of simultaneously forming buried resistors and bipolar transistors by ion implantation Dec. 6, 1983
4416055 Method of fabricating a monolithic integrated circuit structure Nov. 22, 1983
4416708 Method of manufacture of high speed, high power bipolar transistor Nov. 22, 1983
4395812 Forming an integrated circuit Aug. 2, 1983
4368573 Method of manufacturing integrated circuits by means of a multilayer mask Jan. 18, 1983
4311533 Method of making self-aligned differently doped regions by controlled thermal flow of photoresist layer Jan. 19, 1982
4247343 Method of making semiconductor integrated circuits Jan. 27, 1981
4178190 Method of making a bipolar transistor with high-low emitter impurity concentration Dec. 11, 1979
4155778 Forming semiconductor devices having ion implanted and diffused regions May. 22, 1979
4111726 Bipolar integrated circuit process by separately forming active and inactive base regions Sep. 5, 1978
4080721 Fabrication of semiconductor device Mar. 28, 1978
4069074 Method of manufacturing semiconductor devices Jan. 17, 1978
4045258 Method of manufacturing a semiconductor device Aug. 30, 1977
4021270 Double master mask process for integrated circuit manufacture May. 3, 1977
3940288 Method of making a semiconductor device Feb. 24, 1976

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