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Class Information
Number: 438/371
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Self-aligned > Dopant implantation or diffusion > Simultaneous introduction of plural dopants
Description: Process involving the concurrent introduction of multiple dopant species into one or more semiconductive regions of the substrate.










Sub-classes under this class:

Class Number Class Name Patents
438/372 Plural doping steps 111


Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
8552470 Self-powered integrated circuit with multi-junction photovoltaic cell Oct. 8, 2013
8513085 Structure and method to improve threshold voltage of MOSFETs including a high k dielectric Aug. 20, 2013
8482009 Silicon-on-insulator substrate with built-in substrate junction Jul. 9, 2013
8030167 Varied impurity profile region formation for varying breakdown voltage of devices Oct. 4, 2011
7955940 Silicon-on-insulator substrate with built-in substrate junction Jun. 7, 2011
7927955 Adjustable bipolar transistors formed using a CMOS process Apr. 19, 2011
7858478 Method for producing an integrated circuit including a trench transistor and integrated circuit Dec. 28, 2010
7825457 Semiconductor device and manufacturing method therefor Nov. 2, 2010
7759148 Method for manufacturing semiconductor optical device Jul. 20, 2010
7732292 Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Jun. 8, 2010
7645652 CMOS image sensor and method for fabricating the same Jan. 12, 2010
7550355 Low-leakage transistor and manufacturing method thereof Jun. 23, 2009
7525159 Turn-on-efficient bipolar structures for on-chip ESD protection Apr. 28, 2009
7169674 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier Jan. 30, 2007
6806160 Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process Oct. 19, 2004
6716712 Process for producing two differently doped adjacent regions in an integrated semiconductor Apr. 6, 2004
6680497 Interstitial diffusion barrier Jan. 20, 2004
6455380 Semiconductor device and method for fabricating the same Sep. 24, 2002
6440794 Method for forming an array of DRAM cells by employing a self-aligned adjacent node isolation technique Aug. 27, 2002
6368886 Method of recovering encapsulated die Apr. 9, 2002
6352901 Method of fabricating a bipolar junction transistor using multiple selectively implanted collector regions Mar. 5, 2002
6225179 Semiconductor integrated bi-MOS circuit having isolating regions different in thickness between bipolar area and MOS area and process of fabrication thereof May. 1, 2001
5994196 Methods of forming bipolar junction transistors using simultaneous base and emitter diffusion techniques Nov. 30, 1999
5985728 Silicon on insulator process with recovery of a device layer from an etch stop layer Nov. 16, 1999
5972768 Method of manufacturing semiconductor device having low contact resistance Oct. 26, 1999
5940711 Method for making high-frequency bipolar transistor Aug. 17, 1999
5893743 Process of fabricating semiconductor device Apr. 13, 1999
5840603 Method for fabrication BiCMOS integrated circuit Nov. 24, 1998
5773349 Method for making ultrahigh speed bipolar transistor Jun. 30, 1998
5716887 Method of manufacturing BiCMOS device Feb. 10, 1998
5670394 Method of making bipolar transistor having amorphous silicon contact as emitter diffusion source Sep. 23, 1997
5654211 Method for manufacturing ultra-high speed bipolar transistor Aug. 5, 1997
5453389 Defect-free bipolar process Sep. 26, 1995
5340752 Method for forming a bipolar transistor using doped SOG Aug. 23, 1994
5185276 Method for improving low temperature current gain of bipolar transistors Feb. 9, 1993
5137840 Vertical bipolar transistor with recessed epitaxially grown intrinsic base region Aug. 11, 1992
5126278 Method of manufacturing bipolar transistor by implanting intrinsic impurities Jun. 30, 1992
4877748 Bipolar process for forming shallow NPN emitters Oct. 31, 1989
4857476 Bipolar transistor process using sidewall spacer for aligning base insert Aug. 15, 1989
4778772 Method of manufacturing a bipolar transistor Oct. 18, 1988
4774204 Method for forming self-aligned emitters and bases and source/drains in an integrated circuit Sep. 27, 1988
4728618 Method of making a self-aligned bipolar using differential oxidation and diffusion Mar. 1, 1988
4722908 Fabrication of a bipolar transistor with a polysilicon ribbon Feb. 2, 1988
4586968 Process of manufacturing a high frequency bipolar transistor utilizing doped silicide with self-aligned masking May. 6, 1986
4569123 Method of manufacturing a semiconductor device utilizing simultaneous diffusion from an ion implanted polysilicon layer Feb. 11, 1986
4559696 Ion implantation to increase emitter energy gap in bipolar transistors Dec. 24, 1985
4456488 Method of fabricating an integrated planar transistor Jun. 26, 1984
4452645 Method of making emitter regions by implantation through a non-monocrystalline layer Jun. 5, 1984
4290188 Process for producing bipolar semiconductor device utilizing predeposition of dopant and a polycrystalline silicon-gold film followed by simultaneous diffusion Sep. 22, 1981
4263067 Fabrication of transistors having specifically paired dopants Apr. 21, 1981

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