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Class Information
Number: 438/361
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Including isolation structure > Dielectric isolation formed by grooving and refilling with dielectrical material > Including deposition of polysilicon or noninsulative material into groove
Description: Process for making a bipolar transistor wherein a noninsulative material is deposited into the groove in addition to the insulative material.


Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
7615841 Design structure for coupling noise prevention Nov. 10, 2009
7491618 Methods and semiconductor structures for latch-up suppression using a conductive region Feb. 17, 2009
7456061 Method to reduce boron penetration in a SiGe bipolar device Nov. 25, 2008
7456071 Method for forming a strongly-conductive buried layer in a semiconductor substrate Nov. 25, 2008
7432169 Method for manufacturing semiconductor device Oct. 7, 2008
7378326 Printed circuit board with embedded capacitors therein and manufacturing process thereof May. 27, 2008
7268043 Semiconductor device and method of manufacturing the same Sep. 11, 2007
7259069 Semiconductor device and method of manufacturing the same Aug. 21, 2007
7180159 Bipolar transistor having base over buried insulating and polycrystalline regions Feb. 20, 2007
7176120 Method of manufacturing semiconductor device Feb. 13, 2007
7151035 Semiconductor device and manufacturing method thereof Dec. 19, 2006
7091085 Reduced cell-to-cell shorting for memory arrays Aug. 15, 2006
7042063 Semiconductor wafer, semiconductor device, and process for manufacturing the semiconductor device May. 9, 2006
7015115 Method for forming deep trench isolation and related structure Mar. 21, 2006
6979625 Copper interconnects with metal capping layer and selective copper alloys Dec. 27, 2005
6974743 Method of making encapsulated spacers in vertical pass gate DRAM and damascene logic gates Dec. 13, 2005
6936519 Double polysilicon bipolar transistor and method of manufacture therefor Aug. 30, 2005
6927112 Radical processing of a sub-nanometer insulation film Aug. 9, 2005
6900105 Semiconductor device and method of manufacture May. 31, 2005
6884687 SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A Apr. 26, 2005
6878605 Methods for manufacturing SOI substrate using wafer bonding and complementary high voltage bipolar transistor using the SOI substrate Apr. 12, 2005
6875649 Methods for manufacturing integrated circuit devices including an isolation region defining an active region area Apr. 5, 2005
6869852 Self-aligned raised extrinsic base bipolar transistor structure and method Mar. 22, 2005
6861311 SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A Mar. 1, 2005
6861326 Methods of forming semiconductor circuitry Mar. 1, 2005
6858511 Method of semiconductor via testing Feb. 22, 2005
6846710 Method for manufacturing self-aligned BiCMOS Jan. 25, 2005
6830977 METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, T Dec. 14, 2004
6828649 Semiconductor device having an interconnect that electrically connects a conductive material and a doped layer, and a method of manufacture therefor Dec. 7, 2004
6815827 Electrical connection between two faces of a substrate and manufacturing process Nov. 9, 2004
6780725 METHOD FOR FORMING A SEMICONDUCTOR DEVICE INCLUDING FORMING VERTICAL NPN AND PNP TRANSISTORS BY EXPOSING THE EPITAXIAL LAYER, FORMING A MONOCRYSTAL LAYER AND ADJUSTING THE IMPURITY CONCENTRATI Aug. 24, 2004
6750526 Semiconductor device with trench isolation having reduced leak current Jun. 15, 2004
6737688 Method for manufacturing semiconductor device May. 18, 2004
6727157 Method for forming a shallow trench isolation using air gap Apr. 27, 2004
6683364 Integrated circuit devices including an isolation region defining an active region area and methods for manufacturing the same Jan. 27, 2004
6674146 Composite dielectric layers Jan. 6, 2004
6649482 Bipolar transistor with a silicon germanium base and an ultra small self-aligned polysilicon emitter and method of forming the transistor Nov. 18, 2003
6597053 Integrated circuit arrangement with a number of structural elements and method for the production thereof Jul. 22, 2003
6589851 Semiconductor processing methods of forming a conductive grid Jul. 8, 2003
6570239 Semiconductor device having resistive element May. 27, 2003
6433380 Integrated circuit capacitors having composite titanium oxide and tantalum pentoxide dielectric layers therein Aug. 13, 2002
6432809 Method for improved passive thermal flow in silicon on insulator devices Aug. 13, 2002
6399452 Method of fabricating transistors with low thermal budget Jun. 4, 2002
6383847 Partitioned mask layout May. 7, 2002
6383837 Method of manufacturing a multi-chip semiconductor device effective to improve alignment May. 7, 2002
6344399 Method of forming conductive lines and method of forming a conductive grid Feb. 5, 2002
6333235 Method for forming SiGe bipolar transistor Dec. 25, 2001
6271068 Method for making improved polysilicon emitters for bipolar transistors on BiCMOS integrated circuits Aug. 7, 2001
6255184 Fabrication process for a three dimensional trench emitter bipolar transistor Jul. 3, 2001
6184092 Self-aligned contact for trench DMOS transistors Feb. 6, 2001

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