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Class Information
Number: 438/360
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Including isolation structure > Dielectric isolation formed by grooving and refilling with dielectrical material > With epitaxial semiconductor formation in groove
Description: Process for making a bipolar transistor additionally involving the epitaxial deposition of a semiconductor material in the groove.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 8709910 |
Semiconductor process |
Apr. 29, 2014 |
| 8647929 |
Semiconductor devices and methods of manufacturing thereof |
Feb. 11, 2014 |
| 8415224 |
Method of fabricating a semiconductor device including forming trenches having particular structures |
Apr. 9, 2013 |
| 8247282 |
Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process |
Aug. 21, 2012 |
| 8198633 |
Stress transfer enhancement in transistors by a late gate re-crystallization |
Jun. 12, 2012 |
| 8178415 |
Method for manufacturing RF powder |
May. 15, 2012 |
| 8154050 |
Semiconductor device with semiconductor epitaxial layers buried in source/drain regions, and fabrication method of the same |
Apr. 10, 2012 |
| 8129249 |
Integrated transistor, particularly for voltages and method for the production thereof |
Mar. 6, 2012 |
| 7947569 |
Method for producing a semiconductor including a foreign material layer |
May. 24, 2011 |
| 7927977 |
Method of making damascene diodes using sacrificial material |
Apr. 19, 2011 |
| 7883954 |
Self-aligned epitaxially grown bipolar transistor |
Feb. 8, 2011 |
| 7867841 |
Methods of forming semiconductor devices with extended active regions |
Jan. 11, 2011 |
| 7858529 |
Treatment method of semiconductor, method for manufacturing MOS, and MOS structure |
Dec. 28, 2010 |
| 7838372 |
Methods of manufacturing semiconductor devices and structures thereof |
Nov. 23, 2010 |
| 7772060 |
Integrated SiGe NMOS and PMOS transistors |
Aug. 10, 2010 |
| 7759199 |
Stressor for engineered strain on channel |
Jul. 20, 2010 |
| 7754513 |
Latch-up resistant semiconductor structures on hybrid substrates and methods for forming such semiconductor structures |
Jul. 13, 2010 |
| 7696019 |
Semiconductor devices and methods of manufacturing thereof |
Apr. 13, 2010 |
| 7629211 |
Field effect transistor and method of forming a field effect transistor |
Dec. 8, 2009 |
| 7615455 |
Integrated circuit bipolar transistor |
Nov. 10, 2009 |
| 7517771 |
Method for manufacturing semiconductor device having trench |
Apr. 14, 2009 |
| 7435656 |
Semiconductor device of transistor structure having strained semiconductor layer |
Oct. 14, 2008 |
| 7368345 |
Flash memory devices and methods of fabricating the same |
May. 6, 2008 |
| 7354840 |
Method for opto-electronic integration on a SOI substrate |
Apr. 8, 2008 |
| 7351633 |
Method of fabricating semiconductor device using selective epitaxial growth |
Apr. 1, 2008 |
| 7338848 |
Method for opto-electronic integration on a SOI substrate and related structure |
Mar. 4, 2008 |
| 7339254 |
SOI substrate for integration of opto-electronics with SiGe BiCMOS |
Mar. 4, 2008 |
| 7268043 |
Semiconductor device and method of manufacturing the same |
Sep. 11, 2007 |
| 7259069 |
Semiconductor device and method of manufacturing the same |
Aug. 21, 2007 |
| 7153731 |
Method of forming a field effect transistor with halo implant regions |
Dec. 26, 2006 |
| 7151035 |
Semiconductor device and manufacturing method thereof |
Dec. 19, 2006 |
| 6939773 |
Semiconductor devices and manufacturing methods thereof |
Sep. 6, 2005 |
| 6900105 |
Semiconductor device and method of manufacture |
May. 31, 2005 |
| 6884687 |
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A |
Apr. 26, 2005 |
| 6861311 |
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A |
Mar. 1, 2005 |
| 6855612 |
Method for fabricating a bipolar transistor |
Feb. 15, 2005 |
| 6815305 |
Method for fabricating BICMOS semiconductor devices |
Nov. 9, 2004 |
| 6790697 |
Optical semiconductor device and method of fabricating the same |
Sep. 14, 2004 |
| 6740552 |
Method of making vertical diode structures |
May. 25, 2004 |
| 6737688 |
Method for manufacturing semiconductor device |
May. 18, 2004 |
| 6727157 |
Method for forming a shallow trench isolation using air gap |
Apr. 27, 2004 |
| 6723618 |
Methods of forming field isolation structures |
Apr. 20, 2004 |
| 6635543 |
SOI hybrid structure with selective epitaxial growth of silicon |
Oct. 21, 2003 |
| 6599793 |
Memory array with salicide isolation |
Jul. 29, 2003 |
| 6593200 |
Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation |
Jul. 15, 2003 |
| 6579771 |
Self aligned compact bipolar junction transistor layout, and method of making same |
Jun. 17, 2003 |
| 6569744 |
Method of converting a metal oxide semiconductor transistor into a bipolar transistor |
May. 27, 2003 |
| 6528379 |
Method for manufacturing semiconductor integrated circuit device |
Mar. 4, 2003 |
| 6509242 |
Heterojunction bipolar transistor |
Jan. 21, 2003 |
| 6506657 |
Process for forming damascene-type isolation structure for BJT device formed in trench |
Jan. 14, 2003 |
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