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Class Information
Number: 438/358
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Including isolation structure > Isolation by pn junction only > Including epitaxial semiconductor layer formation > Up diffusion of dopant from substrate into epitaxial layer
Description: Process including a step of diffusing a dopant from the semiconductor substrate into the epitaxial layer form thereupon.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8647929 Semiconductor devices and methods of manufacturing thereof Feb. 11, 2014
8581339 Structure of NPN-BJT for improving punch through between collector and emitter Nov. 12, 2013
8574995 Source/drain doping method in 3D devices Nov. 5, 2013
8372716 Method of forming a semiconductor device having vertical charge-compensated structure and sub-surface connecting layer Feb. 12, 2013
8129249 Integrated transistor, particularly for voltages and method for the production thereof Mar. 6, 2012
8119471 Semiconductor device and method for manufacturing the same Feb. 21, 2012
8076725 Semiconductor device and method for manufacturing the same Dec. 13, 2011
7732331 Copper interconnect structure having stuffed diffusion barrier Jun. 8, 2010
7727845 Ultra shallow junction formation by solid phase diffusion Jun. 1, 2010
7696019 Semiconductor devices and methods of manufacturing thereof Apr. 13, 2010
7238583 Back-illuminated imaging device and method of fabricating same Jul. 3, 2007
7202533 Thin film resistors integrated at a single metal interconnect level of die Apr. 10, 2007
7151035 Semiconductor device and manufacturing method thereof Dec. 19, 2006
7091100 Polysilicon bipolar transistor and method of manufacturing it Aug. 15, 2006
6977426 Semiconductor device including high speed transistors and high voltage transistors disposed on a single substrate Dec. 20, 2005
6881641 Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same Apr. 19, 2005
6768173 High voltage MOS transistor with up-retro well Jul. 27, 2004
6756273 Semiconductor component and method of manufacturing Jun. 29, 2004
6589830 Self-aligned process for fabricating power MOSFET with spacer-shaped terraced gate Jul. 8, 2003
6495421 Manufacture of semiconductor material and devices using that material Dec. 17, 2002
6365447 High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth Apr. 2, 2002
6313000 Process for formation of vertically isolated bipolar transistor device Nov. 6, 2001
6297120 Method of manufacturing a semiconductor device Oct. 2, 2001
6291304 Method of fabricating a high voltage transistor using P+ buried layer Sep. 18, 2001
6184100 Method of manufacturing a photodiode Feb. 6, 2001
6171891 Method of manufacture of CMOS device using additional implant regions to enhance ESD performance Jan. 9, 2001
6150225 Method for fabricating a semiconductor device having vertical and lateral type bipolar transistors Nov. 21, 2000
6146957 Method of manufacturing a semiconductor device having a buried region with higher impurity concentration Nov. 14, 2000
6090652 Method of manufacturing a semiconductor device including implanting threshold voltage adjustment ions Jul. 18, 2000
6057184 Semiconductor device fabrication method using connecting implants May. 2, 2000
5976942 Method of manufacturing a high-voltage semiconductor device Nov. 2, 1999
5976940 Method of making plurality of bipolar transistors Nov. 2, 1999
5899714 Fabrication of semiconductor structure having two levels of buried regions May. 4, 1999
5895249 Integrated edge structure for high voltage semiconductor devices and related manufacturing process Apr. 20, 1999
5880002 Method for making isolated vertical PNP transistor in a digital BiCMOS process Mar. 9, 1999
5759902 Method of making an integrated circuit with complementary junction-isolated bipolar transistors Jun. 2, 1998
5756387 Method for forming zener diode with high time stability and low noise May. 26, 1998
5716887 Method of manufacturing BiCMOS device Feb. 10, 1998
5702959 Method for making an isolated vertical transistor Dec. 30, 1997
5679586 Composite mask process for semiconductor fabrication Oct. 21, 1997
5648281 Method for forming an isolation structure and a bipolar transistor on a semiconductor substrate Jul. 15, 1997
5633180 Method of forming P-type islands over P-type buried layer May. 27, 1997
5597742 Semiconductor device and method Jan. 28, 1997
5580798 Method of fabricating bipolar transistor having a guard ring Dec. 3, 1996
5529939 Method of making an integrated circuit with complementary isolated bipolar transistors Jun. 25, 1996
5397714 Method of making an improved graded collector for inductive loads Mar. 14, 1995
5302534 Forming a vertical PNP transistor Apr. 12, 1994
5273912 Method for manufacturing semiconductor device Dec. 28, 1993
5208169 Method of forming high voltage bipolar transistor for a BICMOS integrated circuit May. 4, 1993
5162252 Method of fabricating IIL and vertical complementary bipolar transistors Nov. 10, 1992

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