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Class Information
Number:
438/346
Name:
Semiconductor device manufacturing: process
>
Forming bipolar transistor by formation or alteration of semiconductive active regions
> Emitter dip prevention or utilization
Description:
Process involving special diffusion techniques to eliminate or utilize the tendency of the base-collector junction to "bulge" downward during the emitter diffusion.
Patents under this class:
Patent Number
Title Of Patent
Date Issued
6773978
Methods for improved metal gate fabrication
Aug. 10, 2004
6616786
Process for applying an ink-only label to a polymeric surface
Sep. 9, 2003
6420238
Method of fabricating high-capacitance capacitive elements in a semiconductor substrate
Jul. 16, 2002
4778772
Method of manufacturing a bipolar transistor
Oct. 18, 1988
4667218
NPN transistor with base double doped with arsenic and boron
May. 19, 1987
4263067
Fabrication of transistors having specifically paired dopants
Apr. 21, 1981
4226650
Method of reducing emitter dip in transistors utilizing specifically paired dopants
Oct. 7, 1980
4006046
Method for compensating for emitter-push effect in the fabrication of transistors
Feb. 1, 1977
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