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Class Information
Number: 438/335
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Forming lateral transistor structure
Description: Process for making a bipolar transistor wherein the transistor has a horizontal structure resulting in current flow between its emitter and collector parallel to a major surface of the semiconductor substrate.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7422952 |
Method of forming a BJT with ESD self protection |
Sep. 9, 2008 |
| 7384802 |
ESD protection device for high voltage |
Jun. 10, 2008 |
| 7271070 |
Method for producing transistors |
Sep. 18, 2007 |
| 7217609 |
Semiconductor fabrication process, lateral PNP transistor, and integrated circuit |
May. 15, 2007 |
| 7208386 |
Drain extended MOS transistor with improved breakdown robustness |
Apr. 24, 2007 |
| 7187056 |
Radiation hardened bipolar junction transistor |
Mar. 6, 2007 |
| 7169660 |
Lithography-independent fabrication of small openings for forming vertical mos transistor |
Jan. 30, 2007 |
| 7141478 |
Multi-stage EPI process for forming semiconductor devices, and resulting device |
Nov. 28, 2006 |
| 7098113 |
Method and system for providing a power lateral PNP transistor using a buried power buss |
Aug. 29, 2006 |
| 7026221 |
Method of forming semiconductor device with bipolar transistor having lateral structure |
Apr. 11, 2006 |
| 6987039 |
Forming lateral bipolar junction transistor in CMOS flow |
Jan. 17, 2006 |
| 6930009 |
Laser synthesized wide-bandgap semiconductor electronic devices and circuits |
Aug. 16, 2005 |
| 6927102 |
Semiconductor device and method of forming a semiconductor device |
Aug. 9, 2005 |
| 6902967 |
Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action |
Jun. 7, 2005 |
| 6821870 |
Heterojunction bipolar transistor and method for fabricating the same |
Nov. 23, 2004 |
| 6791155 |
Stress-relieved shallow trench isolation (STI) structure and method for forming the same |
Sep. 14, 2004 |
| 6777302 |
Nitride pedestal for raised extrinsic base HBT process |
Aug. 17, 2004 |
| 6767810 |
Method to increase substrate potential in MOS transistors used in ESD protection circuits |
Jul. 27, 2004 |
| 6767842 |
Implementation of Si-Ge HBT with CMOS process |
Jul. 27, 2004 |
| 6706567 |
High voltage device having polysilicon region in trench and fabricating method thereof |
Mar. 16, 2004 |
| 6692982 |
Optical semiconductor integrated circuit device and manufacturing method for the same |
Feb. 17, 2004 |
| 6638807 |
Technique for gated lateral bipolar transistors |
Oct. 28, 2003 |
| 6569730 |
High voltage transistor using P+ buried layer |
May. 27, 2003 |
| 6563193 |
Semiconductor device |
May. 13, 2003 |
| 6551869 |
Lateral PNP and method of manufacture |
Apr. 22, 2003 |
| 6524922 |
Semiconductor device having increased breakdown voltage and method of fabricating same |
Feb. 25, 2003 |
| 6503808 |
Lateral bipolar transistor and method for producing the same |
Jan. 7, 2003 |
| 6482710 |
Bipolar transistor and manufacting method thereof |
Nov. 19, 2002 |
| 6395609 |
Method for fabricating a bipolar junction transistor with tunneling current through the gate of a field effect transistor as base current |
May. 28, 2002 |
| 6372595 |
Lateral bipolar junction transistor with reduced parasitic current loss |
Apr. 16, 2002 |
| 6277689 |
Nonvolatile memory |
Aug. 21, 2001 |
| 6265277 |
Method for making a bipolar transistor for the protection of an integrated circuit against electrostatic discharges |
Jul. 24, 2001 |
| 6249031 |
High gain lateral PNP and NPN bipolar transistor and process compatible with CMOS for making BiCMOS circuits |
Jun. 19, 2001 |
| 6248639 |
Electrostatic discharge protection circuit and transistor |
Jun. 19, 2001 |
| 6245615 |
Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction |
Jun. 12, 2001 |
| 6242313 |
Use of polysilicon field plates to improve high voltage bipolar device breakdown voltage |
Jun. 5, 2001 |
| 6174779 |
Method for manufacturing a lateral bipolar transistor |
Jan. 16, 2001 |
| 6156617 |
Method of manufacturing semiconductor device |
Dec. 5, 2000 |
| 6146956 |
PNP lateral bipolar electronic device and corresponding manufacturing process |
Nov. 14, 2000 |
| 6140194 |
Method relating to the manufacture of a semiconductor component |
Oct. 31, 2000 |
| 6093613 |
Method for making high gain lateral PNP and NPN bipolar transistor compatible with CMOS for making BICMOS circuits |
Jul. 25, 2000 |
| 5949128 |
Bipolar transistor with MOS-controlled protection for reverse-biased emitter-base junction |
Sep. 7, 1999 |
| 5895249 |
Integrated edge structure for high voltage semiconductor devices and related manufacturing process |
Apr. 20, 1999 |
| 5895247 |
Method of forming a high performance, high voltage non-epi bipolar transistor |
Apr. 20, 1999 |
| 5783472 |
Method of making an SOI transistor |
Jul. 21, 1998 |
| 5716880 |
Method for forming vertical polysilicon diode compatible with CMOS/BICMOS formation |
Feb. 10, 1998 |
| 5679587 |
Method of fabricating an integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors |
Oct. 21, 1997 |
| 5670396 |
Method of forming a DMOS-controlled lateral bipolar transistor |
Sep. 23, 1997 |
| 5670417 |
Method for fabricating self-aligned semiconductor component |
Sep. 23, 1997 |
| 5614424 |
Method for fabricating an accumulated-base bipolar junction transistor |
Mar. 25, 1997 |
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