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Class Information
Number: 438/323
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Complementary bipolar transistors > Having common active region (i.e., integrated injection logic (i2l), etc.)
Description: Process for making complementary bipolar transistors which possess a common active region.










Sub-classes under this class:

Class Number Class Name Patents
438/325 Having lateral bipolar transistor 81
438/324 Including additional electrical device 45


Patents under this class:

Patent Number Title Of Patent Date Issued
8703570 Methods of fabricating substrates Apr. 22, 2014
8603884 Methods of fabricating substrates Dec. 10, 2013
8603885 Flat response device structures for bipolar junction transistors Dec. 10, 2013
8551818 Method of manufacturing electronic device and display Oct. 8, 2013
8283234 Memory including bipolar junction transistor select devices Oct. 9, 2012
8273634 Methods of fabricating substrates Sep. 25, 2012
8247302 Methods of fabricating substrates Aug. 21, 2012
7977787 Semiconductor device Jul. 12, 2011
7354779 Topography compensated film application methods Apr. 8, 2008
7271070 Method for producing transistors Sep. 18, 2007
7144775 Low-voltage single-layer polysilicon eeprom memory cell Dec. 5, 2006
7101750 Semiconductor device for integrated injection logic cell and process for fabricating the same Sep. 5, 2006
7001806 Semiconductor structure with increased breakdown voltage and method for producing the semiconductor structure Feb. 21, 2006
6828206 Semiconductor device and method for fabricating the same Dec. 7, 2004
6828205 Method using wet etching to trim a critical dimension Dec. 7, 2004
6815302 Method of making a bipolar transistor with an oxygen implanted emitter window Nov. 9, 2004
6797577 One mask PNP (or NPN) transistor allowing high performance Sep. 28, 2004
6596600 Integrated injection logic semiconductor device and method of fabricating the same Jul. 22, 2003
6593628 Semiconductor device and method of manufacturing same Jul. 15, 2003
6573146 Methods of manufacturing complementary bipolar transistors Jun. 3, 2003
6423603 Method of forming a microwave array transistor for low-noise and high-power applications Jul. 23, 2002
6344384 Method of production of semiconductor device Feb. 5, 2002
6319800 Static memory cell Nov. 20, 2001
6268638 Metal wire fuse structure with cavity Jul. 31, 2001
6232193 Method of forming isolated integrated injection logic gate May. 15, 2001
6228722 Method for fabricating self-aligned metal silcide May. 8, 2001
5976940 Method of making plurality of bipolar transistors Nov. 2, 1999
5866461 Method for forming an integrated emitter switching configuration using bipolar transistors Feb. 2, 1999
5755979 Application of semiconductor IC fabrication techniques to the manufacturing of a conditioning head for pad conditioning during chemical-mechanical polish May. 26, 1998
4981807 Process for fabricating complementary vertical transistor memory cell Jan. 1, 1991
4651410 Method of fabricating regions of a bipolar microwave integratable transistor Mar. 24, 1987
4433470 Method for manufacturing semiconductor device utilizing selective etching and diffusion Feb. 28, 1984
4420874 Method of producing an IIL semiconductor device utilizing self-aligned thickened oxide patterns Dec. 20, 1983
4408388 Method for manufacturing a bipolar integrated circuit device with a self-alignment base contact Oct. 11, 1983
4407059 Method of producing semiconductor device Oct. 4, 1983
4404737 Method for manufacturing a semiconductor integrated circuit utilizing polycrystalline silicon deposition, oxidation and etching Sep. 20, 1983
4385433 Method of forming metal silicide interconnection electrodes in I.sup.2 L-semiconductor devices May. 31, 1983
4377903 Method for manufacturing an I.sup.2 L semiconductor device Mar. 29, 1983
4255209 Process of fabricating an improved I.sup.2 L integrated circuit utilizing diffusion and epitaxial deposition Mar. 10, 1981
4240846 Method of fabricating up diffused substrate FED logic utilizing a two-step epitaxial deposition Dec. 23, 1980
4199378 Method of manufacturing a semiconductor device and semiconductor device manufactured while using such a method Apr. 22, 1980
4170501 Method of making a semiconductor integrated circuit device utilizing simultaneous outdiffusion and autodoping during epitaxial deposition Oct. 9, 1979
4148055 Integrated circuit having complementary bipolar transistors Apr. 3, 1979
4140559 Method of fabricating an improved substrate fed logic utilizing graded epitaxial deposition Feb. 20, 1979
4106049 Semiconductor device Aug. 8, 1978
4067038 Substrate fed logic and method of fabrication Jan. 3, 1978
3959039 Method of manufacturing vertical complementary bipolar transistors each with epitaxial base zones May. 25, 1976











 
 
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