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Class Information
Number: 438/315
Name: Semiconductor device manufacturing: process > Forming bipolar transistor by formation or alteration of semiconductive active regions > Having heterojunction > Forming inverted transistor structure
Description: Process forming a heterojunction bipolar transistor structure in which a semiconductor body such as a semiconductor substrate or a semiconductor layer is used as its emitter region, a first semiconductor region formed in the semiconductor body is used as the base region and a second semiconductor region formed in the first semiconductor region is used as the collector region.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8637959 Vertical parasitic PNP device in a BiCMOS process and manufacturing method of the same Jan. 28, 2014
8502347 Bipolar junction transistor with epitaxial contacts Aug. 6, 2013
8461633 Thin film transistor and manufacturing method thereof Jun. 11, 2013
8435863 Reverse-conducting semiconductor device and method for manufacturing such a reverse-conducting semiconductor device May. 7, 2013
8377788 SiGe heterojunction bipolar transistor and method of forming a SiGe heterojunction bipolar transistor Feb. 19, 2013
8188532 Semiconductor device having a gate contact structure capable of reducing interfacial resistance May. 29, 2012
8115256 Semiconductor device Feb. 14, 2012
8021951 Formation of longitudinal bipolar transistor with base region in trenches having emitter and collector regions disposed along portions of side surfaces of base region Sep. 20, 2011
7939417 Bipolar transistor and back-gated transistor structure and method May. 10, 2011
7892943 Isolation trenches for memory devices Feb. 22, 2011
7872326 Array of vertical bipolar junction transistors, in particular selectors in a phase change memory device Jan. 18, 2011
7638820 Contact method for thin silicon carbide epitaxial layer and semiconductor devices formed by those methods Dec. 29, 2009
7569474 Method and apparatus for soldering modules to substrates Aug. 4, 2009
7250340 Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench Jul. 31, 2007
6911370 Flash memory device having poly spacers Jun. 28, 2005
6875649 Methods for manufacturing integrated circuit devices including an isolation region defining an active region area Apr. 5, 2005
6858509 Bipolar transistor with upper heterojunction collector and method for making same Feb. 22, 2005
6833308 Structure and method for dual gate oxide thicknesses Dec. 21, 2004
6815272 Bottom gate-type thin-film transistor and method for manufacturing the same Nov. 9, 2004
6777302 Nitride pedestal for raised extrinsic base HBT process Aug. 17, 2004
6777301 Method of producing hetero-junction bipolar transistor Aug. 17, 2004
6683364 Integrated circuit devices including an isolation region defining an active region area and methods for manufacturing the same Jan. 27, 2004
6649472 Method of manufacturing a flash memory cell with high programming efficiency by coupling from floating gate to sidewall Nov. 18, 2003
6624017 Manufacturing process of a germanium implanted HBT bipolar transistor Sep. 23, 2003
6605519 Method for thin film lift-off processes using lateral extended etching masks and device Aug. 12, 2003
6579752 Phosphorus dopant control in low-temperature Si and SiGe epitaxy Jun. 17, 2003
6570215 Nonvolatile memories with floating gate spacers, and methods of fabrication May. 27, 2003
6506670 Self aligned gate Jan. 14, 2003
6500721 Bipolar thin-film transistors and method for forming Dec. 31, 2002
6461927 Semiconductor device and method of producing the same Oct. 8, 2002
6436765 Method of fabricating a trenched flash memory cell Aug. 20, 2002
6426266 Manufacturing method for an inverted-structure bipolar transistor with improved high-frequency characteristics Jul. 30, 2002
6329259 Collector-up RF power transistor Dec. 11, 2001
6281089 Method for fabricating an embedded flash memory cell Aug. 28, 2001
6150224 Method of manufacturing a semiconductor device with a bipolar transistor Nov. 21, 2000
6090675 Formation of dielectric layer employing high ozone:tetraethyl-ortho-silicate ratios during chemical vapor deposition Jul. 18, 2000
5943577 Method of making heterojunction bipolar structure having air and implanted isolations Aug. 24, 1999
5821149 Method of fabricating a heterobipolar transistor Oct. 13, 1998
5710058 Method of making multi-terminal resonant tunneling transistor Jan. 20, 1998
5705408 Method for forming semiconductor integrated circuit using monolayer epitaxial growth Jan. 6, 1998
5631173 Method for forming collector up heterojunction bipolar transistor having insulative extrinsic emitter May. 20, 1997
5512496 Method of making collector-up bipolar transistor having improved emitter injection efficiency Apr. 30, 1996
5434091 Method for making collector up bipolar transistors having reducing junction capacitance and increasing current gain Jul. 18, 1995
5296389 Method of fabricating a heterojunction bipolar transistor Mar. 22, 1994
5264379 Method of making a hetero-junction bipolar transistor Nov. 23, 1993
5252500 Method of fabricating a semiconductor device Oct. 12, 1993
5166081 Method of producing a bipolar transistor Nov. 24, 1992
5053346 Method for making a high speed gallium arsenide transistor Oct. 1, 1991
5047365 Method for manufacturing a heterostructure transistor having a germanium layer on gallium arsenide using molecular beam epitaxial growth Sep. 10, 1991
5037769 Method of manufacturing semiconductor device Aug. 6, 1991

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