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Class Information
Number: 438/296
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including isolation structure > Dielectric isolation formed by grooving and refilling with dielectric material
Description: Process for making an insulated gate field effect transistor including the step of forming an isolation structure by making a recess in the semiconductor substrate and refilling the recess with an insulative material.

Patents under this class:

Patent Number Title Of Patent Date Issued
7157350 Method of forming SOI-like structure in a bulk semiconductor substrate using self-organized atomic migration Jan. 2, 2007
7157324 Transistor structure having reduced transistor leakage attributes Jan. 2, 2007
7153731 Method of forming a field effect transistor with halo implant regions Dec. 26, 2006
7151048 Poly/silicide stack and method of forming the same Dec. 19, 2006
7151022 Methods for forming shallow trench isolation Dec. 19, 2006
7138319 Deep trench isolation of embedded DRAM for improved latch-up immunity Nov. 21, 2006
7135371 Methods of fabricating semiconductor devices Nov. 14, 2006
7129149 Method for forming shallow trench isolation structure with anti-reflective liner Oct. 31, 2006
7129148 Methods for manufacturing semiconductor devices and semiconductor devices having trench isolation regions Oct. 31, 2006
7125778 Method for fabricating a self-aligning mask Oct. 24, 2006
7122431 Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions Oct. 17, 2006
7122428 Device isolation method of semiconductor memory device and flash memory device fabricating method using the same Oct. 17, 2006
7122427 Method of fabricating non-volatile memory device Oct. 17, 2006
7122426 Method of fabricating cell of nonvolatile memory device with floating gate Oct. 17, 2006
7122416 Method for forming a filled trench in a semiconductor layer of a semiconductor substrate, and a semiconductor substrate with a semiconductor layer having a filled trench therein Oct. 17, 2006
7118975 Method for manufacturing a semiconductor device Oct. 10, 2006
7118963 Semiconductor memory integrated circuit and its manufacturing method Oct. 10, 2006
7112511 CMOS image sensor having prism and method for fabricating the same Sep. 26, 2006
7105389 Method of manufacturing semiconductor device having impurity region under isolation region Sep. 12, 2006
7101765 Enhancing strained device performance by use of multi narrow section layout Sep. 5, 2006
7094644 Method for manufacturing a semiconductor device Aug. 22, 2006
7094653 Method for forming STI structures with controlled step height Aug. 22, 2006
7087497 Low-thermal-budget gapfill process Aug. 8, 2006
7078286 Process for fabricating a semiconductor device having electrically isolated low voltage and high voltage regions Jul. 18, 2006
7074662 Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage Jul. 11, 2006
7074681 Semiconductor component and method of manufacturing Jul. 11, 2006
7074682 Method for fabricating a semiconductor device having self aligned source (SAS) crossing trench Jul. 11, 2006
7067342 Method of integrating optical devices and electronic devices on an integrated circuit Jun. 27, 2006
7067373 Semiconductor integrated circuit device and a method of manufacturing the same Jun. 27, 2006
7067425 Method of manufacturing flash memory device Jun. 27, 2006
7064038 Semiconductor device and method for fabricating the same Jun. 20, 2006
7060573 Extended poly buffer STI scheme Jun. 13, 2006
7052964 Strained channel transistor and methods of manufacture May. 30, 2006
7049239 STI structure and fabricating methods thereof May. 23, 2006
7045425 Bird's beak-less or STI-less OTP EPROM May. 16, 2006
7041547 Methods of forming polished material and methods of forming isolation regions May. 9, 2006
7037791 Application of single exposure alternating aperture phase shift mask to form sub 0.18 micron polysilicon gates May. 2, 2006
7037792 Formation of removable shroud by anisotropic plasma etch May. 2, 2006
7022565 Method of fabricating a trench capacitor of a mixed mode integrated circuit Apr. 4, 2006
7023068 Method of etching a lateral trench under a drain junction of a MOS transistor Apr. 4, 2006
7018897 Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate spacers Mar. 28, 2006
7018927 Method for forming isolation film for semiconductor devices Mar. 28, 2006
7012007 Strained silicon MOSFET having improved thermal conductivity and method for its fabrication Mar. 14, 2006
7008843 Methods of forming memory circuitry Mar. 7, 2006
7008847 Semiconductor device having electrically erasable programmable read-only memory (EEPROM) and mask-ROM and method of fabricating the same Mar. 7, 2006
7005339 Method of integrating high voltage metal oxide semiconductor devices and submicron metal oxide semiconductor devices Feb. 28, 2006
7001713 Method of forming partial reverse active mask Feb. 21, 2006
6995072 Method of making sacrificial self-aligned interconnection structure Feb. 7, 2006
6995095 Methods of simultaneously fabricating isolation structures having varying dimensions Feb. 7, 2006
6992024 Gapfill process using a combination of spin-on-glass deposition and chemical vapor deposition techniques Jan. 31, 2006

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