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Class Information
Number: 438/296
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including isolation structure > Dielectric isolation formed by grooving and refilling with dielectric material
Description: Process for making an insulated gate field effect transistor including the step of forming an isolation structure by making a recess in the semiconductor substrate and refilling the recess with an insulative material.

Patents under this class:
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Patent Number Title Of Patent Date Issued
6841447 EEPROM device having an isolation-bounded tunnel capacitor and fabrication process Jan. 11, 2005
6841459 Method of manufacturing semiconductor device Jan. 11, 2005
6833310 Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same Dec. 21, 2004
6833602 Device having electrically isolated low voltage and high voltage regions and process for fabricating the device Dec. 21, 2004
6828198 System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process Dec. 7, 2004
6828646 Isolating trench and manufacturing process Dec. 7, 2004
6825087 Hydrogen anneal for creating an enhanced trench for trench MOSFETS Nov. 30, 2004
6825544 Method for shallow trench isolation and shallow trench isolation structure Nov. 30, 2004
6821857 High on-current device for high performance embedded DRAM (eDRAM) and method of forming the same Nov. 23, 2004
6818508 Non-volatile semiconductor memory device and manufacturing method thereof Nov. 16, 2004
6818511 Non-volatile memory device to protect floating gate from charge loss and method for fabricating the same Nov. 16, 2004
6818526 Method for moat nitride pull back for shallow trench isolation Nov. 16, 2004
6818995 Semiconductor device and method of manufacturing the same Nov. 16, 2004
6815292 Flash memory having improved core field isolation in select gate regions Nov. 9, 2004
6808988 Method for forming isolation in flash memory wafer Oct. 26, 2004
6808995 Semiconductor device with minimal short-channel effects and low bit-line resistance Oct. 26, 2004
6803273 Method to salicide source-line in flash memory with STI Oct. 12, 2004
6797587 Active region corner implantation method for fabricating a semiconductor integrated circuit microelectronic fabrication Sep. 28, 2004
6790746 Method for improvement of edge breakdown caused by edge electrical field at a tunnel oxide of a high-density flash memory by a shielded bird's beak Sep. 14, 2004
6791142 Stacked-gate flash memory and the method of making the same Sep. 14, 2004
6787409 Method of forming trench isolation without grooving Sep. 7, 2004
6787422 Method of body contact for SOI mosfet Sep. 7, 2004
6787423 Strained-silicon semiconductor device Sep. 7, 2004
6780714 Semiconductor devices and their manufacture Aug. 24, 2004
6780721 Low dielectric constant shallow trench isolation Aug. 24, 2004
6780743 Method of forming a floating gate in a flash memory device Aug. 24, 2004
6777336 Method of forming a shallow trench isolation structure Aug. 17, 2004
6777741 Non-volatile memory cells with selectively formed floating gate Aug. 17, 2004
6770537 Low dielectric constant shallow trench isolation Aug. 3, 2004
6767813 Integrated circuit devices having active regions with expanded effective widths and methods of manufacturing same Jul. 27, 2004
6764921 Semiconductor device and method for fabricating the same Jul. 20, 2004
6762103 Method of forming an isolation film in a semiconductor device Jul. 13, 2004
6756263 Method of manufacturing semiconductor device Jun. 29, 2004
6756653 Low dielectric constant shallow trench isolation Jun. 29, 2004
6753237 Method of shallow trench isolation fill-in without generation of void Jun. 22, 2004
6750066 Precision high-K intergate dielectric layer Jun. 15, 2004
6746935 MOS transistor in an integrated circuit and active area forming method Jun. 8, 2004
6746936 Method for forming isolation film for semiconductor devices Jun. 8, 2004
6740566 Ultra-thin resist shallow trench process using high selectivity nitride etch May. 25, 2004
6737321 Method of manufacturing flash memory device May. 18, 2004
6737328 Methods of forming silicon dioxide layers, and methods of forming trench isolation regions May. 18, 2004
6737723 Low dielectric constant shallow trench isolation May. 18, 2004
6734524 Electronic component and method of manufacturing same May. 11, 2004
6730555 Transistors having selectively doped channel regions May. 4, 2004
6730576 Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer May. 4, 2004
6727150 Methods of forming trench isolation within a semiconductor substrate including, Tshaped trench with spacers Apr. 27, 2004
6723662 Methods of forming gate oxide films in integrated circuit devices using wet or dry oxidization processes with reduced chloride Apr. 20, 2004
6716710 Using a first liner layer as a spacer in a semiconductor device Apr. 6, 2004
6703270 Method of manufacturing a semiconductor device Mar. 9, 2004

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