 |
|
 |
| |
 |
|
Class Information
Number: 438/290
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.) > After formation of source or drain regions and gate electrode
Description: Process wherein the semiconductor channel region is doped subsequent to the formation of the source and drain regions and the gate electrode.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7598146 |
Self-aligned gate and method |
Oct. 6, 2009 |
| 7595244 |
Fabrication of like-polarity insulated-gate field-effect transistors having multiple vertical body dopant concentration maxima and different halo pocket characteristics |
Sep. 29, 2009 |
| 7560324 |
Drain extended MOS transistors and methods for making the same |
Jul. 14, 2009 |
| 7557049 |
Producing method of wired circuit board |
Jul. 7, 2009 |
| 7504292 |
Short channel effect engineering in MOS device using epitaxially carbon-doped silicon |
Mar. 17, 2009 |
| 7491613 |
Line element and method of manufacturing the line element |
Feb. 17, 2009 |
| 7488653 |
Semiconductor device and method for implantation of doping agents in a channel |
Feb. 10, 2009 |
| 7462543 |
Flash memory cell transistor with threshold adjust implant and source-drain implant formed using a single mask |
Dec. 9, 2008 |
| 7432164 |
Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same |
Oct. 7, 2008 |
| 7422948 |
Threshold voltage adjustment for long channel transistors |
Sep. 9, 2008 |
| 7405129 |
Device comprising doped nano-component and method of forming the device |
Jul. 29, 2008 |
| 7405128 |
Dotted channel MOSFET and method |
Jul. 29, 2008 |
| 7393737 |
Semiconductor device and a method of manufacturing the same |
Jul. 1, 2008 |
| 7371667 |
Semiconductor device and method of fabricating same |
May. 13, 2008 |
| 7368357 |
Semiconductor device having a graded LDD region and fabricating method thereof |
May. 6, 2008 |
| 7364951 |
Nonvolatile semiconductor memory device and method for manufacturing the same |
Apr. 29, 2008 |
| 7344947 |
Methods of performance improvement of HVMOS devices |
Mar. 18, 2008 |
| 7314801 |
Semiconductor device having a surface conducting channel and method of forming |
Jan. 1, 2008 |
| 7306998 |
Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect |
Dec. 11, 2007 |
| 7195967 |
Nonvolatile semiconductor memory device and manufacturing method thereof |
Mar. 27, 2007 |
| 7179712 |
Multibit ROM cell and method therefor |
Feb. 20, 2007 |
| 7172933 |
Recessed polysilicon gate structure for a strained silicon MOSFET device |
Feb. 6, 2007 |
| 7151033 |
Method for manufacturing a semiconductor device having a low junction leakage current |
Dec. 19, 2006 |
| 7084036 |
Data writing method for mask read only memory |
Aug. 1, 2006 |
| 7064026 |
Semiconductor device having shared contact and fabrication method thereof |
Jun. 20, 2006 |
| 7060572 |
MOSFET with short channel structure and formation method thereof |
Jun. 13, 2006 |
| 7037790 |
Independently accessed double-gate and tri-gate transistors in same process flow |
May. 2, 2006 |
| 7018880 |
Method for manufacturing a MOS transistor having reduced 1/f noise |
Mar. 28, 2006 |
| 7018901 |
Method for forming a semiconductor device having a strained channel and a heterojunction source/drain |
Mar. 28, 2006 |
| 6989307 |
Mask ROM, and fabrication method thereof |
Jan. 24, 2006 |
| 6955970 |
Process for manufacturing a low voltage MOSFET power device having a minimum figure of merit |
Oct. 18, 2005 |
| 6930004 |
Self-aligned drain/channel junction in vertical pass transistor DRAM cell design for device scaling |
Aug. 16, 2005 |
| 6927137 |
Forming a retrograde well in a transistor to enhance performance of the transistor |
Aug. 9, 2005 |
| 6916716 |
Asymmetric halo implants |
Jul. 12, 2005 |
| 6893921 |
Nonvolatile memories with a floating gate having an upward protrusion |
May. 17, 2005 |
| 6893928 |
Semiconductor device and method of manufacturing the same |
May. 17, 2005 |
| 6885071 |
Semiconductor integrated circuit making use of standard cells |
Apr. 26, 2005 |
| 6884688 |
Method for producing a MOS transistor and MOS transistor |
Apr. 26, 2005 |
| 6872640 |
SOI CMOS device with reduced DIBL |
Mar. 29, 2005 |
| 6873008 |
Asymmetrical devices for short gate length performance with disposable sidewall |
Mar. 29, 2005 |
| 6867104 |
Method to form a structure to decrease area capacitance within a buried insulator device |
Mar. 15, 2005 |
| 6858447 |
Method for testing semiconductor chips |
Feb. 22, 2005 |
| 6821855 |
Reverse metal process for creating a metal silicide transistor gate structure |
Nov. 23, 2004 |
| 6806157 |
Metal oxide semiconductor field effect transistor for reducing resistance between source and drain and method for fabricating the same |
Oct. 19, 2004 |
| 6790782 |
Process for fabrication of a transistor gate including high-K gate dielectric with in-situ resist trim, gate etch, and high-K dielectric removal |
Sep. 14, 2004 |
| 6780716 |
Chip differentiation at the level of a reticle |
Aug. 24, 2004 |
| 6764909 |
Structure and method of MOS transistor having increased substrate resistance |
Jul. 20, 2004 |
| 6727123 |
Method for manufacturing a thin-film transistor comprising a recombination center |
Apr. 27, 2004 |
| 6709935 |
Method of locally forming a silicon/geranium channel layer |
Mar. 23, 2004 |
| 6677206 |
Non-volatile high-performance memory device and relative manufacturing process |
Jan. 13, 2004 |
|
|
|
 |
|
 |
|
| |
Randomly Featured Patents |
|
