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Class Information
Number: 438/282
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Buried channel
Description: Process for making an insulated gate field effect transistor wherein the channel formed between the source and drain regions is configured so as to be located beneath the semiconductor substrate surface.

Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
7081390 Semiconductor device and a method of manufacturing the same Jul. 25, 2006
7081391 Integrated circuit devices having buried insulation layers and methods of forming the same Jul. 25, 2006
7074700 Method for isolation layer for a vertical DRAM Jul. 11, 2006
7075829 Programmable memory address and decode circuits with low tunnel barrier interpoly insulators Jul. 11, 2006
7074687 Method for forming an ESD protection device Jul. 11, 2006
7075155 Structure for protecting a semiconductor circuit from electrostatic discharge and a method for forming the structure Jul. 11, 2006
7067362 Integrated circuit with protected implantation profiles and method for the formation thereof Jun. 27, 2006
7052966 Deep N wells in triple well structures and method for fabricating same May. 30, 2006
7041560 Method of manufacturing a superjunction device with conventional terminations May. 9, 2006
7022560 Method to manufacture high voltage MOS transistor by ion implantation Apr. 4, 2006
7002213 Transistor and logic circuit on thin silicon-on-insulator wafers based on gate induced drain leakage currents Feb. 21, 2006
6987054 Method of fabricating a semiconductor device having a groove formed in a resin layer Jan. 17, 2006
6972461 Channel MOSFET with strained silicon channel on strained SiGe Dec. 6, 2005
6967140 Quantum wire gate device and method of making same Nov. 22, 2005
6930004 Self-aligned drain/channel junction in vertical pass transistor DRAM cell design for device scaling Aug. 16, 2005
6921913 Strained-channel transistor structure with lattice-mismatched zone Jul. 26, 2005
6919236 Biased, triple-well fully depleted SOI structure, and various methods of making and operating same Jul. 19, 2005
6917077 Protection diode for improved ruggedness of a radio frequency power transistor and self-defining method to manufacture such protection diode Jul. 12, 2005
6900102 Methods of forming double gate electrodes using tunnel and trench May. 31, 2005
6875650 Eliminating substrate noise by an electrically isolated high-voltage I/O transistor Apr. 5, 2005
6864140 Thin-film transistor used as heating element for microreaction chamber Mar. 8, 2005
6864533 MOS field effect transistor with reduced on-resistance Mar. 8, 2005
6855989 Damascene finfet gate with selective metal interdiffusion Feb. 15, 2005
6838329 High concentration indium fluorine retrograde wells Jan. 4, 2005
6835615 Method of manufacturing buried gate MOS semiconductor device having PIP capacitor Dec. 28, 2004
6815765 Semiconductor device with function of modulating gain coefficient and semiconductor integrated circuit including the same Nov. 9, 2004
6806143 Self-aligned source pocket for flash memory cells Oct. 19, 2004
6797547 Bladed silicon-on-insulator semiconductor devices and method of making Sep. 28, 2004
6787850 Dynamic threshold voltage MOS transistor fitted with a current limiter Sep. 7, 2004
6730585 Method of fabricating high-voltage transistor with buried conduction layer May. 4, 2004
6689664 Transistor fabrication method Feb. 10, 2004
6667227 Trenched gate metal oxide semiconductor device and method Dec. 23, 2003
6656802 Process of manufacturing a semiconductor device including a buried channel field effect transistor Dec. 2, 2003
6642120 Semiconductor circuit Nov. 4, 2003
6627505 Method of producing SOI MOSFET having threshold voltage of central and edge regions in opposite directions Sep. 30, 2003
6611027 Protection transistor with improved edge structure Aug. 26, 2003
6593191 Buried channel strained silicon FET using a supply layer created through ion implantation Jul. 15, 2003
6583044 Buried channel in a substrate and method of making same Jun. 24, 2003
6573143 Trench transistor structure and formation method Jun. 3, 2003
6534362 Method for fabricating a memory cell configuration Mar. 18, 2003
6495891 Transistor having impurity concentration distribution capable of improving short channel effect Dec. 17, 2002
6448121 High threshold PMOS transistor in a surface-channel process Sep. 10, 2002
6440805 Method of forming a semiconductor device with isolation and well regions Aug. 27, 2002
6426258 Method of manufacturing a semiconductor integrated circuit device Jul. 30, 2002
6383850 Semiconductor device and method of manufacturing the same May. 7, 2002
6380036 Semiconductor device and method of manufacturing the same Apr. 30, 2002
6369424 Field effect transistor having high breakdown withstand capacity Apr. 9, 2002
6358817 Semiconductor storage unit and method of manufacturing the same Mar. 19, 2002
6348372 Method for reducing PN junction leakage Feb. 19, 2002
6346444 Power semiconductor device using semi-insulating polycrystalline silicon and fabrication method thereof Feb. 12, 2002

1 2 3 4 5

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