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Class Information
Number: 438/276
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Making plural insulated gate field effect transistors of differing electrical characteristics > Introducing a dopant into the channel region of selected transistors
Description: Process for making plural insulated gate field effect transistors having a step of introducing an electrically active dopant species into the semiconductor channel region beneath the gate insulator of one or more transistors to produce transistors of differing electrical characteristics.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7091093 |
Method for fabricating a semiconductor device having a pocket dopant diffused layer |
Aug. 15, 2006 |
| 7049189 |
Method of fabricating non-volatile memory cell adapted for integration of devices and for multiple read/write operations |
May. 23, 2006 |
| 7015535 |
Nonvolatile semiconductor memory device |
Mar. 21, 2006 |
| 7008848 |
Mask ROM fabrication method |
Mar. 7, 2006 |
| 6998316 |
Method for fabricating read only memory including a first and second exposures to a photoresist layer |
Feb. 14, 2006 |
| 6979609 |
Method of fabricating MOSFET transistors with multiple threshold voltages by halo compensation and masks |
Dec. 27, 2005 |
| 6969642 |
Method of controlling implantation dosages during coding of read-only memory devices |
Nov. 29, 2005 |
| 6933188 |
Use of a selective hard mask for the integration of double diffused drain MOS devices in deep sub-micron fabrication technologies |
Aug. 23, 2005 |
| 6919607 |
Structure of two-bit mask read-only memory device and fabricating method thereof |
Jul. 19, 2005 |
| 6916716 |
Asymmetric halo implants |
Jul. 12, 2005 |
| 6916713 |
Code implantation process |
Jul. 12, 2005 |
| 6900101 |
LDMOS transistors and methods for making the same |
May. 31, 2005 |
| 6888202 |
Low-power high-performance storage circuitry |
May. 3, 2005 |
| 6879007 |
Low volt/high volt transistor |
Apr. 12, 2005 |
| 6870233 |
Multi-bit ROM cell with bi-directional read and a method for making thereof |
Mar. 22, 2005 |
| 6867085 |
Insulated gate semiconductor device and method of manufacturing the same |
Mar. 15, 2005 |
| 6861372 |
Semiconductor device manufacturing method |
Mar. 1, 2005 |
| 6835622 |
Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknesses |
Dec. 28, 2004 |
| 6828197 |
Method for fabricating nitride read only memory |
Dec. 7, 2004 |
| 6818494 |
LDMOS and CMOS integrated circuit and method of making |
Nov. 16, 2004 |
| 6815768 |
Semiconductor integrated circuit device incorporating memory cell transistor and logic transistor, and method of manufacturing the same |
Nov. 9, 2004 |
| 6812085 |
Semiconductor device and method for fabricating same |
Nov. 2, 2004 |
| 6808990 |
Random access memory cell and method for fabricating same |
Oct. 26, 2004 |
| 6803285 |
Method of fabricating dual threshold voltage n-channel and p-channel mosfets with a single extra masked implant operation |
Oct. 12, 2004 |
| 6803282 |
Methods for fabricating low CHC degradation mosfet transistors |
Oct. 12, 2004 |
| 6794253 |
Mask ROM structure and method of fabricating the same |
Sep. 21, 2004 |
| 6780698 |
Semiconductor device and its production method |
Aug. 24, 2004 |
| 6780697 |
Method of manufacturing lateral double-diffused metal oxide semiconductor device |
Aug. 24, 2004 |
| 6780717 |
Semiconductor integrated circuit device and method of manufacturing the same |
Aug. 24, 2004 |
| 6773972 |
Memory cell with transistors having relatively high threshold voltages in response to selective gate doping |
Aug. 10, 2004 |
| 6762100 |
Mask ROM cell and method of fabricating the same |
Jul. 13, 2004 |
| 6753230 |
Method for fabricating semiconductor device with ultra-shallow super-steep-retrograde epi-channel by decaborane doping |
Jun. 22, 2004 |
| 6734064 |
Method for fabricating read only memory including forming masking layers with openings and pre-coding the cell and peripheral regions |
May. 11, 2004 |
| 6730568 |
Method for fabricating semiconductor device with ultra-shallow super-steep-retrograde epi-channel by boron-fluoride compound doping |
May. 4, 2004 |
| 6730555 |
Transistors having selectively doped channel regions |
May. 4, 2004 |
| 6720210 |
Mask ROM structure and manufacturing method thereof |
Apr. 13, 2004 |
| 6717208 |
Disabling flash memory to protect memory contents |
Apr. 6, 2004 |
| 6713821 |
Structure of a mask ROM device |
Mar. 30, 2004 |
| 6713354 |
Coding method for mask ROM |
Mar. 30, 2004 |
| 6703670 |
Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor |
Mar. 9, 2004 |
| 6689663 |
Methods of code programming a mask ROM |
Feb. 10, 2004 |
| 6689662 |
Method of forming a high voltage power MOSFET having low on-resistance |
Feb. 10, 2004 |
| 6677194 |
Method of manufacturing a semiconductor integrated circuit device |
Jan. 13, 2004 |
| 6677206 |
Non-volatile high-performance memory device and relative manufacturing process |
Jan. 13, 2004 |
| 6673663 |
Methods of forming field effect transistors and related field effect transistor constructions |
Jan. 6, 2004 |
| 6673682 |
Methods of fabricating high density mask ROM cells |
Jan. 6, 2004 |
| 6670246 |
Method for forming a vertical nitride read-only memory |
Dec. 30, 2003 |
| 6670247 |
Method of fabricating mask read only memory |
Dec. 30, 2003 |
| 6667214 |
Non-volatile semiconductor memory devices and methods for manufacturing the same |
Dec. 23, 2003 |
| 6664164 |
UV-programmed P-type Mask ROM and fabrication thereof |
Dec. 16, 2003 |
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