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Class Information
Number: 438/275
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Making plural insulated gate field effect transistors of differing electrical characteristics
Description: Process for making multiple insulated gate field effect transistors of differing electrical characteristics.

Sub-classes under this class:

Class Number Class Name Patents
438/276 Introducing a dopant into the channel region of selected transistors 388

Patents under this class:

Patent Number Title Of Patent Date Issued
8709855 Intralevel conductive light shield Apr. 29, 2014
8704229 Partial poly amorphization for channeling prevention Apr. 22, 2014
8691651 Method of forming non-planar FET Apr. 8, 2014
8691646 FINFET compatible PC-bounded ESD diode Apr. 8, 2014
8691644 Method of forming a CMOS device with a stressed-channel NMOS transistor and a strained-channel PMOS transistor Apr. 8, 2014
8686514 Multiple threshold voltages in field effect transistor devices Apr. 1, 2014
8685811 Method for manufacturing a CMOS device having dual metal gate Apr. 1, 2014
8679923 Method for forming metal gate Mar. 25, 2014
8674458 Transistors with embedded strain-inducing material formed in cavities provided by an oxidizing etch process Mar. 18, 2014
8673759 Dry etch polysilicon removal for replacement gates Mar. 18, 2014
8673720 Structure and fabrication of field-effect transistor having nitrided gate dielectric layer with tailored vertical nitrogen concentration profile Mar. 18, 2014
8673711 Methods of fabricating a semiconductor device having a high-K gate dielectric layer and semiconductor devices fabricated thereby Mar. 18, 2014
8669617 Multi-gate transistors Mar. 11, 2014
8664066 Formation of a channel semiconductor alloy by forming a nitride based hard mask layer Mar. 4, 2014
8659112 Carbon and nitrogen doping for selected PMOS transistor on an integrated circuit Feb. 25, 2014
8658502 Method for reducing morphological difference between N-doped and undoped polysilicon gates after etching Feb. 25, 2014
8658501 Method and apparatus for flatband voltage tuning of high-k field effect transistors Feb. 25, 2014
8652956 High-k metal gate electrode structures formed by separate removal of placeholder materials using a masking regime prior to gate patterning Feb. 18, 2014
8652908 Semiconductor devices employing high-K dielectric layers as a gate insulating layer and methods of fabricating the same Feb. 18, 2014
8652907 Integrating transistors with different poly-silicon heights on the same die Feb. 18, 2014
8648407 Semiconductor device and method for fabricating thereof Feb. 11, 2014
8642471 Semiconductor structure and method for manufacturing the same Feb. 4, 2014
8642457 Method of fabricating semiconductor device Feb. 4, 2014
8637370 Integration of trench MOS with low voltage integrated circuits Jan. 28, 2014
8633536 Gate dielectric of semiconductor device Jan. 21, 2014
8633118 Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging Jan. 21, 2014
8629514 Methods and structures for customized STI structures in semiconductor devices Jan. 14, 2014
8629023 CMOS image sensor having double gate insulator therein and method for manufacturing the same Jan. 14, 2014
8629022 Asymmetric FET including sloped threshold voltage adjusting material layer and method of fabricating same Jan. 14, 2014
8629021 Integration scheme for an NMOS metal gate Jan. 14, 2014
8629007 Method of improving replacement metal gate fill Jan. 14, 2014
8617955 Method and system for forming low contact resistance device Dec. 31, 2013
8617954 Formation of nitrogen containing dielectric layers having an improved nitrogen distribution Dec. 31, 2013
8614475 Void free interlayer dielectric Dec. 24, 2013
8614128 CMOS structures and processes based on selective thinning Dec. 24, 2013
8610220 Semiconductor device with self-aligned interconnects Dec. 17, 2013
8609495 Hybrid gate process for fabricating finfet device Dec. 17, 2013
8598007 Methods of performing highly tilted halo implantation processes on semiconductor devices Dec. 3, 2013
8598005 Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices Dec. 3, 2013
8592902 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure Nov. 26, 2013
8586437 Semiconductor device and method of manufacturing the semiconductor device Nov. 19, 2013
8586436 Method of forming a variety of replacement gate types including replacement gate types on a hybrid semiconductor device Nov. 19, 2013
8580641 Techniques providing high-k dielectric metal gate CMOS Nov. 12, 2013
8580629 Method of fabricating semiconductor device using a work function control film Nov. 12, 2013
8574990 Method of manufacturing semiconductor device having metal gate Nov. 5, 2013
8574979 Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS process flow Nov. 5, 2013
8574973 Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor and a conventional CMOS transistor Nov. 5, 2013
8569801 Three-dimensional CMOS circuit on two offset substrates and method for making same Oct. 29, 2013
8569137 Method of improving PMOS performance in a contact etch stop layer process Oct. 29, 2013
8569136 Manufacturing method of semiconductor device Oct. 29, 2013

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