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Class Information
Number: 438/269
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Vertical channel > Utilizing epitaxial semiconductor layer grown through an opening in an insulating layer
Description: Process for making an insulated gate field effect transistor wherein a epitaxial semiconductor layer is deposited through an opening in an insulating layer upon a semiconductor substrate.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7432161 |
Fabrication of optical-quality facets vertical to a (001) orientation substrate by selective epitaxial growth |
Oct. 7, 2008 |
| 7374990 |
Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array |
May. 20, 2008 |
| 7371645 |
Method of manufacturing a field effect transistor device with recessed channel and corner gate device |
May. 13, 2008 |
| 7361556 |
Method of fabricating semiconductor side wall fin |
Apr. 22, 2008 |
| 7354826 |
Method for forming memory array bitlines comprising epitaxially grown silicon and related structure |
Apr. 8, 2008 |
| 7314799 |
Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making |
Jan. 1, 2008 |
| 7303966 |
Semiconductor device and method of manufacturing the same |
Dec. 4, 2007 |
| 7300837 |
FinFET transistor device on SOI and method of fabrication |
Nov. 27, 2007 |
| 7276416 |
Method of forming a vertical transistor |
Oct. 2, 2007 |
| 7271067 |
Voltage sustaining layer with opposite-doped islands for semiconductor power devices |
Sep. 18, 2007 |
| 7271066 |
Semiconductor device and a method of manufacturing the same |
Sep. 18, 2007 |
| 7268043 |
Semiconductor device and method of manufacturing the same |
Sep. 11, 2007 |
| 7262099 |
Methods of forming field effect transistors |
Aug. 28, 2007 |
| 7259069 |
Semiconductor device and method of manufacturing the same |
Aug. 21, 2007 |
| 7241655 |
Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array |
Jul. 10, 2007 |
| 7238576 |
Semiconductor device and method of manufacturing the same |
Jul. 3, 2007 |
| 7163864 |
Method of fabricating semiconductor side wall fin |
Jan. 16, 2007 |
| 7153731 |
Method of forming a field effect transistor with halo implant regions |
Dec. 26, 2006 |
| 7144779 |
Method of forming epitaxial silicon-comprising material |
Dec. 5, 2006 |
| 7138315 |
Low thermal resistance semiconductor device and method therefor |
Nov. 21, 2006 |
| 7138316 |
Semiconductor channel on insulator structure |
Nov. 21, 2006 |
| 7132339 |
Transistor structure with thick recessed source/drain structures and fabrication process of same |
Nov. 7, 2006 |
| 7118960 |
Selective polysilicon stud growth |
Oct. 10, 2006 |
| 7084001 |
Method of forming film including a comb tooth patterning film |
Aug. 1, 2006 |
| 7067376 |
High voltage power MOSFET having low on-resistance |
Jun. 27, 2006 |
| 7045845 |
Self-aligned vertical gate semiconductor device |
May. 16, 2006 |
| 7029977 |
Fabrication method of semiconductor wafer |
Apr. 18, 2006 |
| 7015125 |
Trench MOSFET device with polycrystalline silicon source contact structure |
Mar. 21, 2006 |
| 6969644 |
Versatile system for triple-gated transistors with engineered corners |
Nov. 29, 2005 |
| 6955969 |
Method of growing as a channel region to reduce source/drain junction capacitance |
Oct. 18, 2005 |
| 6924205 |
Collar formation using selective SiGe/Si etch |
Aug. 2, 2005 |
| 6908815 |
Dual work function semiconductor structure with borderless contact and method of fabricating the same |
Jun. 21, 2005 |
| 6900099 |
Flash memory cell and method for fabricating the same |
May. 31, 2005 |
| 6878993 |
Self-aligned trench MOS junction field-effect transistor for high-frequency applications |
Apr. 12, 2005 |
| 6875657 |
Method of fabricating trench MIS device with graduated gate oxide layer |
Apr. 5, 2005 |
| 6875656 |
Method for improving silicon-on-insulator (SOI) film uniformity on a semiconductor wafer |
Apr. 5, 2005 |
| 6864129 |
Double gate MOSFET transistor and method for the production thereof |
Mar. 8, 2005 |
| 6821864 |
Method to achieve increased trench depth, independent of CD as defined by lithography |
Nov. 23, 2004 |
| 6797569 |
Method for low topography semiconductor device formation |
Sep. 28, 2004 |
| 6773994 |
CMOS vertical replacement gate (VRG) transistors |
Aug. 10, 2004 |
| 6762098 |
Trench DMOS transistor with embedded trench schottky rectifier |
Jul. 13, 2004 |
| 6756273 |
Semiconductor component and method of manufacturing |
Jun. 29, 2004 |
| 6727195 |
Method and system for decreasing the spaces between wordlines |
Apr. 27, 2004 |
| 6699754 |
Flash memory cell and method for fabricating the same |
Mar. 2, 2004 |
| 6673646 |
Growth of compound semiconductor structures on patterned oxide films and process for fabricating same |
Jan. 6, 2004 |
| 6670244 |
Method for fabricating a body region for a vertical MOS transistor arrangement having a reduced on resistivity |
Dec. 30, 2003 |
| 6660582 |
Method of forming a vertical field-effect transistor device |
Dec. 9, 2003 |
| 6660584 |
Selective polysilicon stud growth of 6F2 memory cell manufacturing having a convex upper surface profile |
Dec. 9, 2003 |
| 6660590 |
Vertical transistor and method of manufacturing thereof |
Dec. 9, 2003 |
| 6642115 |
Double-gate FET with planarized surfaces and self-aligned silicides |
Nov. 4, 2003 |
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