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Class Information
Number: 438/241
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including passive device (e.g., resistor, capacitor, etc.) > Capacitor > And additional field effect transistor (e.g., sense or access transistor, etc.)
Description: Process for making an insulated gate field effect transistor having combined therewith a capacitor and an additional field effect transistor.

Sub-classes under this class:

Class Number Class Name Patents
438/242 Including transistor formed on trench sidewalls 303

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
6468857 Method for forming a semiconductor device having a plurality of circuits parts Oct. 22, 2002
6468850 Method of manufacturing a semiconductor memory device Oct. 22, 2002
6465308 Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant Oct. 15, 2002
6461914 Process for making a MIM capacitor Oct. 8, 2002
6461959 Method of fabrication of a contact plug in an embedded memory Oct. 8, 2002
6461930 Capacitor and method for forming the same Oct. 8, 2002
6461911 Semiconductor memory device and fabricating method thereof Oct. 8, 2002
6458646 Asymmetric gates for high density DRAM Oct. 1, 2002
6459632 Semiconductor memory device having redundancy function Oct. 1, 2002
6458644 Data bus architecture for integrated circuit devices having embedded dynamic random access memory (DRAM) with a large aspect ratio providing reduced capacitance and power requirements Oct. 1, 2002
6455371 Method for forming capacitor of a DRAM having a wall protection structure Sep. 24, 2002
6455367 Method of making high density semiconductor memory Sep. 24, 2002
6455366 Method of forming a junction region in a semiconductor device Sep. 24, 2002
6455368 Semiconductor memory device having bitlines of common height Sep. 24, 2002
6452776 Capacitor with defect isolation and bypass Sep. 17, 2002
6448590 Multiple threshold voltage FET using multiple work-function gate materials Sep. 10, 2002
6448129 Applying epitaxial silicon in disposable spacer flow Sep. 10, 2002
6448130 Method of selectively forming silicide film of merged DRAM and Logic Sep. 10, 2002
6448609 Method and system for providing a polysilicon stringer monitor Sep. 10, 2002
6448190 Method and apparatus for fabrication of integrated circuit by selective deposition of precursor liquid Sep. 10, 2002
6444538 Method for manufacturing a semiconductor memory device using hemispherical grain silicon Sep. 3, 2002
6445035 Power MOS device with buried gate and groove Sep. 3, 2002
6436759 Method for fabricating a MOS transistor of an embedded memory Aug. 20, 2002
6436758 Method for forming storage node contact plug of DRAM (dynamic random access memory) Aug. 20, 2002
6432768 Method of fabricating memory device and logic device on the same chip Aug. 13, 2002
6432787 Method and apparatus for providing low-GIDL dual workfunction gate doping with borderless diffusion contact Aug. 13, 2002
6429067 Dual mask process for semiconductor devices Aug. 6, 2002
6426243 Methods of forming dynamic random access memory circuitry Jul. 30, 2002
6426256 Method for fabricating an embedded DRAM with self-aligned borderless contacts Jul. 30, 2002
6423602 Circuit manufacturing method and apparatus, anneal control method and apparatus, information storage medium Jul. 23, 2002
6420227 Semiconductor integrated circuit device and process for manufacture of the same Jul. 16, 2002
6420223 Manufacturing process for non-volatile floating gate memory cells integrated on a semiconductor substrate and comprised in a cell matrix with an associated control circuitry Jul. 16, 2002
6417043 Memory cell configuration and fabrication method Jul. 9, 2002
6417044 Non-volatile memory and memory of manufacturing the same Jul. 9, 2002
6413814 Manufacture of a semiconductor device with retrograded wells Jul. 2, 2002
6410382 Fabrication method of semiconductor device Jun. 25, 2002
6410399 Process to lower strap, wordline and bitline contact resistance in trench-based DRAMS by silicidization Jun. 25, 2002
6403423 Modified gate processing for optimized definition of array and logic devices on same chip Jun. 11, 2002
6403417 Method for in-situ fabrication of a landing via and a strip contact in an embedded memory Jun. 11, 2002
6403416 Method for making a double-cylinder-capacitor structure for dynamic random access memory (DRAM) Jun. 11, 2002
6403404 Method of selectively forming a silicide layer on a logic area of a semiconductor substrate Jun. 11, 2002
6399424 Method of manufacturing contact structure Jun. 4, 2002
6399433 Method for fabricating a memory cell Jun. 4, 2002
6395596 Method of fabricating a MOS transistor in an embedded memory May. 28, 2002
6391702 Method of manufacture for semiconductor devices May. 21, 2002
6391704 Method for manufacturing an MDL semiconductor device including a DRAM device having self-aligned contact hole and a logic device having dual gate structure May. 21, 2002
6391703 Buried strap for DRAM using junction isolation technique May. 21, 2002
6391755 Method of making EEPROM transistor for a DRAM May. 21, 2002
6383863 Approach to integrate salicide gate for embedded DRAM devices May. 7, 2002

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

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