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Class Information
Number: 438/241
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including passive device (e.g., resistor, capacitor, etc.) > Capacitor > And additional field effect transistor (e.g., sense or access transistor, etc.)
Description: Process for making an insulated gate field effect transistor having combined therewith a capacitor and an additional field effect transistor.










Sub-classes under this class:

Class Number Class Name Patents
438/242 Including transistor formed on trench sidewalls 303


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
6873010 High performance logic and high density embedded dram with borderless contact and antispacer Mar. 29, 2005
6869872 Method of manufacturing a semiconductor memory device having a metal contact structure Mar. 22, 2005
6869845 Semiconductor memory device having a memory region and a peripheral region, and a manufacturing method thereof Mar. 22, 2005
6855595 Method for manufacturing a CMOS image sensor having a capacitor's top electrode in contact with a photo-sensing element Feb. 15, 2005
6852589 Method to modify 0.25 .mu.m 1T-RAM by extra resist protect oxide (RPO) blocking Feb. 8, 2005
6852591 Method of forming CMOS imager with storage capacitor Feb. 8, 2005
6849517 Methods of forming capacitors including reducing exposed electrodes in semiconductor devices Feb. 1, 2005
6849889 Semiconductor device having storage node contact plug of DRAM (dynamic random access memory) Feb. 1, 2005
6849387 Method for integrating copper process and MIM capacitor for embedded DRAM Feb. 1, 2005
6847078 Non-volatile memory device and method of forming the same Jan. 25, 2005
6844228 Manufacturing method of a semiconductor device capable of accurately setting a resistance value of a resistance element Jan. 18, 2005
6835615 Method of manufacturing buried gate MOS semiconductor device having PIP capacitor Dec. 28, 2004
6825077 Method of forming memory cells and a method of isolating a single row of memory cells Nov. 30, 2004
6821840 Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area Nov. 23, 2004
6822848 Dynamic random access memory (DRAM) circuitry Nov. 23, 2004
6815288 Merged memory and logic semiconductor device of salicided dual gate structure including embedded memory of self-aligned contact structure and manufacturing method thereof Nov. 9, 2004
6815295 Method of manufacturing field effect transistors Nov. 9, 2004
6815761 Semiconductor integrated circuit device Nov. 9, 2004
6815287 Localized array threshold voltage implant to enhance charge storage within DRAM memory cells Nov. 9, 2004
6808973 Manufacturing method of semiconductor device Oct. 26, 2004
6800520 Localized array threshold voltage implant enhance charge storage within DRAM memory cells Oct. 5, 2004
6794238 Process for forming metallized contacts to periphery transistors Sep. 21, 2004
6794711 Non-volatile memory device having select transistor structure and SONOS cell structure and method for fabricating the device Sep. 21, 2004
6790729 Method of manufacturing NAND flash memory device Sep. 14, 2004
6787830 Semiconductor device and method for fabricating the same Sep. 7, 2004
6784068 Capacitor fabrication method Aug. 31, 2004
6784052 Method of forming a capacitor with two diffusion barrier layers formed in the same step Aug. 31, 2004
6780707 Method of forming semiconductor device having contact pad on source/drain region in peripheral circuit area Aug. 24, 2004
6780717 Semiconductor integrated circuit device and method of manufacturing the same Aug. 24, 2004
6780715 Method for fabricating merged dram with logic semiconductor device Aug. 24, 2004
6780708 METHOD OF FORMING CORE AND PERIPHERY GATES INCLUDING TWO CRITICAL MASKING STEPS TO FORM A HARD MASK IN A CORE REGION THAT INCLUDES A CRITICAL DIMENSION LESS THAN ACHIEVABLE AT A RESOLUTION LIM Aug. 24, 2004
6777341 Method of forming a self-aligned contact, and method of fabricating a semiconductor device having a self-aligned contact Aug. 17, 2004
6777336 Method of forming a shallow trench isolation structure Aug. 17, 2004
6770927 Structures comprising transistor gates Aug. 3, 2004
6764901 Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor Jul. 20, 2004
6764900 Method of fabricating an X-ray detector array element Jul. 20, 2004
6756264 Applying epitaxial silicon in disposable spacer flow Jun. 29, 2004
6756263 Method of manufacturing semiconductor device Jun. 29, 2004
6753252 Contact plug formation for devices with stacked capacitors Jun. 22, 2004
6753243 SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMOR Jun. 22, 2004
6746911 Semiconductor device with stacked memory and logic substrates and method for fabricating the same Jun. 8, 2004
6746921 Method of forming an array of FLASH field effect transistors and circuitry peripheral to such array Jun. 8, 2004
6743670 High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits Jun. 1, 2004
6737314 Semiconductor device manufacturing method and semiconductor device May. 18, 2004
6734059 Semiconductor device with deep trench isolation and method of manufacturing same May. 11, 2004
6734060 Semiconductor integrated circuit device and process for manufacturing May. 11, 2004
6727141 DRAM having offset vertical transistors and method Apr. 27, 2004
6724031 Method for preventing strap-to-strap punch through in vertical DRAMs Apr. 20, 2004
6723662 Methods of forming gate oxide films in integrated circuit devices using wet or dry oxidization processes with reduced chloride Apr. 20, 2004
6723607 Method of forming fine patterns of semiconductor device Apr. 20, 2004

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