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Class Information
Number: 438/241
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including passive device (e.g., resistor, capacitor, etc.) > Capacitor > And additional field effect transistor (e.g., sense or access transistor, etc.)
Description: Process for making an insulated gate field effect transistor having combined therewith a capacitor and an additional field effect transistor.










Sub-classes under this class:

Class Number Class Name Patents
438/242 Including transistor formed on trench sidewalls 303


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
4183040 MOS RAM with implant forming peripheral depletion MOSFET channels and capacitor bottom electrodes Jan. 8, 1980
4085498 Fabrication of integrated circuits containing enhancement-mode FETs and depletion-mode FETs with two layers of polycrystalline silicon utilizing five basic pattern delineating steps Apr. 25, 1978

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15










 
 
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