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Class Information
Number: 438/241
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Including passive device (e.g., resistor, capacitor, etc.) > Capacitor > And additional field effect transistor (e.g., sense or access transistor, etc.)
Description: Process for making an insulated gate field effect transistor having combined therewith a capacitor and an additional field effect transistor.

Sub-classes under this class:

Class Number Class Name Patents
438/242 Including transistor formed on trench sidewalls 303

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
6194301 Method of fabricating an integrated circuit of logic and memory using damascene gate structure Feb. 27, 2001
6190958 Fully self-aligned method for fabricating transistor and memory Feb. 20, 2001
6190959 Semiconductor memory array having sublithographic spacing between adjacent trenches and method for making the same Feb. 20, 2001
6184076 DRAM contact process by localized etch-stop removal Feb. 6, 2001
6184077 Method for fabricating crown-type capacitor of semiconductor device Feb. 6, 2001
6177307 Process of planarizing crown capacitor for integrated circuit Jan. 23, 2001
6177306 Method for forming a silicide in a dynamic random access memory device Jan. 23, 2001
6174766 Semiconductor device and method of manufacturing the semiconductor device Jan. 16, 2001
6168998 Dual gate MOSFET fabrication method Jan. 2, 2001
6168985 Semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity and method of manufacturing same Jan. 2, 2001
6165829 Thin film transistor and fabrication method therefor Dec. 26, 2000
6165827 Semiconductor transistor devices and methods for forming semiconductor transistor devices Dec. 26, 2000
6162675 Method of preventing misalignment of selective silicide layer in the manufacture of a DRAM device and the DRAM device formed thereby Dec. 19, 2000
6162681 DRAM cell with a fork-shaped capacitor Dec. 19, 2000
6162674 Method of manufacturing semiconductor device Dec. 19, 2000
6156602 Self-aligned precise high sheet RHO register for mixed-signal application Dec. 5, 2000
6157055 Semiconductor memory device having a long data retention time with the increase in leakage current suppressed Dec. 5, 2000
6156605 Method of fabricating DRAM device Dec. 5, 2000
6156604 Method for making an open bit line memory cell with a vertical transistor and trench plate trench capacitor Dec. 5, 2000
6153459 Method of fabricating dual gate structure of embedded DRAM Nov. 28, 2000
6153476 Semiconductor device and method for manufacturing the same Nov. 28, 2000
6153458 Method of forming a portion of a memory cell Nov. 28, 2000
6150210 Memory cell that includes a vertical transistor and a trench capacitor Nov. 21, 2000
6146936 Integrated circuitry, methods of reducing alpha particle inflicted damage to SRAM cells, methods of forming integrated circuitry, and methods of forming SRAM cells Nov. 14, 2000
6143596 Planarization for interlayer dielectric Nov. 7, 2000
6140162 Reduction of masking and doping steps in a method of fabricating a liquid crystal display Oct. 31, 2000
6140174 Methods of forming wiring layers on integrated circuits including regions of high and low topography Oct. 31, 2000
6136641 Method for manufacturing capacitor of semiconductor device including thermal treatment to dielectric film under hydrogen atmosphere Oct. 24, 2000
6133087 Method of making a DRAM element and a logic element Oct. 17, 2000
6133083 Method to fabricate embedded DRAM Oct. 17, 2000
6127231 Method of making transistors in an IC including memory cells Oct. 3, 2000
6124163 Integrated chip multiplayer decoupling capacitors Sep. 26, 2000
6124192 Method for fabricating ultra-small interconnections using simplified patterns and sidewall contact plugs Sep. 26, 2000
6124199 Method for simultaneously forming a storage-capacitor electrode and interconnect Sep. 26, 2000
6117725 Method for making cost-effective embedded DRAM structures compatible with logic circuit processing Sep. 12, 2000
6110782 Method to combine high voltage device and salicide process Aug. 29, 2000
6104053 Semiconductor device comprising capacitor in logic circuit area and method of fabricating the same Aug. 15, 2000
6103561 Depletion mode MOS capacitor with patterned V.sub.T implants Aug. 15, 2000
6103621 Silicide process for mixed mode product with dual layer capacitor which is protected by a capacitor protective oxide during silicidation of FET device Aug. 15, 2000
6103622 Silicide process for mixed mode product with dual layer capacitor and polysilicon resistor which is protected with a capacitor protective oxide during silicidation of FET device Aug. 15, 2000
6100126 Method of making a resistor utilizing a polysilicon plug formed with a high aspect ratio Aug. 8, 2000
6093597 SRAM having P-channel TFT as load element with less series-connected high resistance Jul. 25, 2000
6090654 Method for manufacturing a static random access memory cell Jul. 18, 2000
6091098 Double-crown rugged polysilicon capacitor Jul. 18, 2000
6083791 Self-aligned stacked gate etch process for fabricating a two-transistor EEPROM cell Jul. 4, 2000
6083788 Stacked capacitor memory cell and method of manufacture Jul. 4, 2000
6083828 Method for forming a self-aligned contact Jul. 4, 2000
6077738 Inter-level dielectric planarization approach for a DRAM crown capacitor process Jun. 20, 2000
6074908 Process for making merged integrated circuits having salicide FETS and embedded DRAM circuits Jun. 13, 2000
6069038 Method of manufacturing a semiconductor integrated circuit device May. 30, 2000

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

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