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Class Information
Number: 438/233
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And contact formation
Description: Process for making complementary insulated gate field effect transistors including a step of forming electrical connections to the transistors.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6127214 Contact gate structure and method Oct. 3, 2000
6121098 Semiconductor manufacturing method Sep. 19, 2000
6114194 Method for fabricating a field device transistor Sep. 5, 2000
6107128 Semiconductor device and method of manufacturing the same Aug. 22, 2000
6096639 Method of forming a local interconnect by conductive layer patterning Aug. 1, 2000
6096590 Scalable MOS field effect transistor Aug. 1, 2000
6093629 Method of simplified contact etching and ion implantation for CMOS technology Jul. 25, 2000
6090656 Linear capacitor and process for making same Jul. 18, 2000
6090674 Method of forming a hole in the sub quarter micron range Jul. 18, 2000
6083827 Method for fabricating local interconnect Jul. 4, 2000
6080661 Methods for fabricating gate and diffusion contacts in self-aligned contact processes Jun. 27, 2000
6048756 Method for making a silicon-on-insulator MOS transistor using a selective SiGe epitaxy Apr. 11, 2000
6043116 Method of fabricating self-align-contact Mar. 28, 2000
6040206 Thin film transistor Mar. 21, 2000
6015726 Semiconductor device and method of producing the same Jan. 18, 2000
6010935 Self aligned contacts Jan. 4, 2000
6004838 ESD protection using selective siliciding techniques Dec. 21, 1999
5998289 Process for obtaining a transistor having a silicon-germanium gate Dec. 7, 1999
5994193 Method of making high performance MOSFET with integrated poly/metal gate electrode Nov. 30, 1999
5985722 Method of fabricating electrostatic discharge device Nov. 16, 1999
5985711 Method of fabricating semiconductor device Nov. 16, 1999
5970334 Method of manufacturing contacts to diverse doped regions using intermediate layer of arsenic or phosphorus Oct. 19, 1999
5970335 Semiconductor processing method of forming complementary n-type doped and p-type doped active regions within a semiconductor substrate Oct. 19, 1999
5953612 Self-aligned silicidation technique to independently form silicides of different thickness on a semiconductor device Sep. 14, 1999
5950081 Method of fabricating semiconductor Sep. 7, 1999
5950083 Method for fabricating CMOS transistor with self-aligned silicide (salicide) structure Sep. 7, 1999
5940699 Process of fabricating semiconductor device Aug. 17, 1999
5937289 Providing dual work function doping Aug. 10, 1999
5930633 Integrated butt-contact process in shallow trench isolation Jul. 27, 1999
5930617 Method of forming deep sub-micron CMOS transistors with self-aligned silicided contact and extended S/D junction Jul. 27, 1999
5930616 Methods of forming a field effect transistor and method of forming CMOS circuitry Jul. 27, 1999
5917199 Solid state imager including TFTS with variably doped contact layer system for reducing TFT leakage current and increasing mobility and method of making same Jun. 29, 1999
5913136 Process for making a transistor with self-aligned source and drain contacts Jun. 15, 1999
5909616 Method of forming CMOS circuitry Jun. 1, 1999
5902121 Semiconductor device and method for manufacturing semiconductor device May. 11, 1999
5899742 Manufacturing method for self-aligned local interconnects and contacts simultaneously May. 4, 1999
5897349 Method for fabricating a capped gate conductor Apr. 27, 1999
5885890 Method of forming contact openings and an electric component formed from the same and other methods Mar. 23, 1999
5874328 Reverse CMOS method for dual isolation semiconductor device Feb. 23, 1999
5866451 Method of making a semiconductor device having 4t sram and mixed-mode capacitor in logic Feb. 2, 1999
5866456 Method for fabricating a semiconductor memory device Feb. 2, 1999
5840604 Methods of forming MOS transistors having hot-carrier suppression electrodes Nov. 24, 1998
5824577 MOSFET with reduced leakage current Oct. 20, 1998
5814541 Method for manufacturing semiconductor device Sep. 29, 1998
5811329 Method of forming CMOS circuitry including patterning a layer of conductive material overlying field isolation oxide Sep. 22, 1998
5801419 High frequency MOS device Sep. 1, 1998
5798552 Transistor suitable for high voltage circuit Aug. 25, 1998
5759883 Method for making semiconductor device capable of independently forming MOS transistors and bipolar transistor Jun. 2, 1998
5721165 Method of forming CMOS circuitry Feb. 24, 1998
5718800 Self-aligned N+/P+ doped polysilicon plugged contacts to N+/P+ doped polysilicon gates and to N+/P+ doped source/drain regions Feb. 17, 1998

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