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Class Information
Number: 438/233
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And contact formation
Description: Process for making complementary insulated gate field effect transistors including a step of forming electrical connections to the transistors.










Patents under this class:
1 2 3 4 5 6 7 8 9

Patent Number Title Of Patent Date Issued
6972231 Rad Hard MOSFET with graded body diode junction and reduced on resistance Dec. 6, 2005
6953719 Integrating n-type and p-type metal gate transistors Oct. 11, 2005
6927117 Method for integration of silicide contacts and silicide gate metals Aug. 9, 2005
6911366 Method for forming contact openings on a MOS integrated circuit Jun. 28, 2005
6902969 Process for forming dual metal gate structures Jun. 7, 2005
6858492 Method for fabricating a semiconductor memory device Feb. 22, 2005
6858483 Integrating n-type and p-type metal gate transistors Feb. 22, 2005
6855599 Fabrication method of a flash memory device Feb. 15, 2005
6849497 Method of fabricating a semiconductor integrated circuit including a capacitor formed on a single insulating substrate layer having lower boron dose in the vicinity of the surface thereof Feb. 1, 2005
6833310 Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same Dec. 21, 2004
6828238 Methods of forming openings extending through electrically insulative material to electrically conductive material Dec. 7, 2004
6808975 Method for forming a self-aligned contact hole in a semiconductor device Oct. 26, 2004
6806134 Sidewall strap for complementary semiconductor structures and method of making same Oct. 19, 2004
6790719 Process for forming dual metal gate structures Sep. 14, 2004
6773986 Method for fabricating a semiconductor memory device Aug. 10, 2004
6773977 Method of forming a diode for integration with a semiconductor device and method of forming a transistor device having an integrated diode Aug. 10, 2004
6767782 Manufacturing method of semiconductor device Jul. 27, 2004
6764893 Method for reducing a parasitic capacitance of a semiconductive memory cell using metal mask for sidewall formation Jul. 20, 2004
6730553 Methods for making semiconductor structures having high-speed areas and high-density areas May. 4, 2004
6724054 Self-aligned contact formation using double SiN spacers Apr. 20, 2004
6710466 Method of fabricating integrated circuit having self-aligned metal contact structure Mar. 23, 2004
6699746 Method for manufacturing semiconductor device Mar. 2, 2004
6689655 Method for production process for the local interconnection level using a dielectric conducting pair on pair Feb. 10, 2004
6673665 Semiconductor device having increased metal silicide portions and method of forming the semiconductor Jan. 6, 2004
6649451 Structure and method for wafer comprising dielectric and semiconductor Nov. 18, 2003
6645846 Methods of forming conductive contacts to conductive structures Nov. 11, 2003
6642135 Method for forming semiconductor memory device having a fuse Nov. 4, 2003
6638805 Method of fabricating a DRAM semiconductor device Oct. 28, 2003
6635558 Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions Oct. 21, 2003
6630397 Method to improve surface uniformity of a layer of arc used for the creation of contact plugs Oct. 7, 2003
6610565 Method of forming a CMOS type semiconductor device Aug. 26, 2003
6602746 Dual-gate CMOS semiconductor device manufacturing method Aug. 5, 2003
6580132 Damascene double-gate FET Jun. 17, 2003
6576939 Semiconductor processing methods, methods of forming electronic components, and transistors Jun. 10, 2003
6548876 Semiconductor device of sub-micron or high voltage CMOS structure and method for manufacturing the same Apr. 15, 2003
6544888 Advanced contact integration scheme for deep-sub-150 nm devices Apr. 8, 2003
6534393 Method for fabricating local metal interconnections with low contact resistance and gate electrodes with improved electrical conductivity Mar. 18, 2003
6514834 Method of manufacturing a semiconductor device having a low leakage current Feb. 4, 2003
6486067 Method for improving the electrical isolation between the contact and gate in a self-aligned contact MOSFET device structure Nov. 26, 2002
6486016 Method for forming self aligned contacts Nov. 26, 2002
6486015 Low temperature carbon rich oxy-nitride for improved RIE selectivity Nov. 26, 2002
6472261 Method of forming an integrated circuit contact structure having gate electrode protection for self-aligned contacts with zero enclosure Oct. 29, 2002
6465296 Vertical source/drain contact semiconductor Oct. 15, 2002
6444515 Method of fabricating a semiconductor device Sep. 3, 2002
6429099 Implementing contacts for bodies of semiconductor-on-insulator transistors Aug. 6, 2002
6423627 Method for forming memory array and periphery contacts using a same mask Jul. 23, 2002
6413811 Method of forming a shared contact in a semiconductor device including MOSFETS Jul. 2, 2002
6399470 Method for forming contact holes on conductors having a protective layer using selective etching Jun. 4, 2002
6395623 Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions May. 28, 2002
6383921 Self aligned silicide contact method of fabrication May. 7, 2002

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