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Class Information
Number: 438/233
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And contact formation
Description: Process for making complementary insulated gate field effect transistors including a step of forming electrical connections to the transistors.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8101515 Methods of manufacturing semiconductor devices having contact plugs in insulation layers Jan. 24, 2012
8084320 Non-volatile memory and method for fabricating the same Dec. 27, 2011
8058123 Integrated circuit and method of fabrication thereof Nov. 15, 2011
8058119 Device scheme of HKMG gate-last process Nov. 15, 2011
8030608 Backside illuminated imaging device, semiconductor substrate, imaging apparatus and method for manufacturing backside illuminated imaging device Oct. 4, 2011
8008179 Methods using silver compositions for micro-deposition direct writing silver conductor lines on photovoltaic wafers Aug. 30, 2011
7998823 Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process Aug. 16, 2011
7989335 Methods of forming insulation layer patterns and methods of manufacturing semiconductor devices including insulation layer patterns Aug. 2, 2011
7985643 Semiconductor transistors with contact holes close to gates Jul. 26, 2011
7977182 Method of manufacturing MISFET with low contact resistance Jul. 12, 2011
7964457 Semiconductor integrated circuit device and a manufacturing method for the same Jun. 21, 2011
7960280 Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flow Jun. 14, 2011
7955925 Method of manufacturing semiconductor device Jun. 7, 2011
7932105 Systems and methods for detecting and monitoring nickel-silicide process and induced failures Apr. 26, 2011
7915111 Semiconductor device with high-K/dual metal gate Mar. 29, 2011
7906390 Thin gate electrode CMOS devices and methods of fabricating same Mar. 15, 2011
7902610 Semiconductor device and method for manufacturing same Mar. 8, 2011
7892908 Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates Feb. 22, 2011
7888214 Selective stress relaxation of contact etch stop layer through layout design Feb. 15, 2011
7875542 Methods for forming wiring and manufacturing thin film transistor and droplet discharging method Jan. 25, 2011
7861406 Method of forming CMOS transistors with dual-metal silicide formed through the contact openings Jan. 4, 2011
7851286 Bottom source LDMOSFET method Dec. 14, 2010
7838359 Technique for forming contact insulation layers and silicide regions with different characteristics Nov. 23, 2010
7825025 Method and system for improved nickel silicide Nov. 2, 2010
7824619 Molecular sensors for explosives Nov. 2, 2010
7820467 Imaging device and method that cancels voltage signal noise based on pre-saturated charges and supersaturated charges Oct. 26, 2010
7807569 Method of manufacturing a contact structure for a semiconductor device Oct. 5, 2010
7781282 Shared contact structure, semiconductor device and method of fabricating the semiconductor device Aug. 24, 2010
7772064 Method of fabricating self-aligned contact Aug. 10, 2010
7767511 Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile Aug. 3, 2010
7754602 Semiconductor device and method for fabricating the same Jul. 13, 2010
7745331 Method for fabricating contact plug in semiconductor device Jun. 29, 2010
7732323 Methods of manufacturing semiconductor devices having contact plugs in insulation layers Jun. 8, 2010
7727834 Contact configuration and method in dual-stress liner semiconductor device Jun. 1, 2010
7723179 Light emitting device and method for manufacturing the same May. 25, 2010
7718500 Formation of raised source/drain structures in NFET with embedded SiGe in PFET May. 18, 2010
7714393 Semiconductor device and method for manufacturing same May. 11, 2010
7704819 Creating high voltage FETs with low voltage process Apr. 27, 2010
7678642 Method for manufacturing phase change memory device using a patterning process Mar. 16, 2010
7670896 Method and structure for reducing floating body effects in MOSFET devices Mar. 2, 2010
7666745 Method of manufacturing a semiconductor device and a semiconductor device Feb. 23, 2010
7666748 Method of forming amorphous source/drain extensions Feb. 23, 2010
7655525 Semiconductor device free of gate spacer stress and method of manufacturing the same Feb. 2, 2010
7615828 CMOS devices adapted to prevent latchup and methods of manufacturing the same Nov. 10, 2009
7605033 Low resistance peripheral local interconnect contacts with selective wet strip of titanium Oct. 20, 2009
7595232 CMOS devices incorporating hybrid orientation technology (HOT) with embedded connectors Sep. 29, 2009
7585720 Dual stress liner device and method Sep. 8, 2009
7579250 Method for reducing hot carrier effect of MOS transistor Aug. 25, 2009
7575967 Semiconductor integrated circuit device and a manufacturing method for the same Aug. 18, 2009
7572694 Method of manufacturing a semiconductor device Aug. 11, 2009

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