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Class Information
Number: 438/230
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > Self-aligned > Utilizing gate sidewall structure
Description: Process with a step of utilizing a structure located on the sidewall of the gate electrode as the previously formed device feature.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7621041 |
Methods for forming multilayer structures |
Nov. 24, 2009 |
| 7611938 |
Semiconductor device having high drive current and method of manufacture therefor |
Nov. 3, 2009 |
| 7608499 |
Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same |
Oct. 27, 2009 |
| 7605044 |
Method of manufacturing semiconductor device |
Oct. 20, 2009 |
| 7591659 |
Method and structure for second spacer formation for strained silicon MOS transistors |
Sep. 22, 2009 |
| 7579250 |
Method for reducing hot carrier effect of MOS transistor |
Aug. 25, 2009 |
| 7572692 |
Complementary transistors having different source and drain extension spacing controlled by different spacer sizes |
Aug. 11, 2009 |
| 7569445 |
Semiconductor device with constricted current passage |
Aug. 4, 2009 |
| 7569464 |
Method for manufacturing a semiconductor device having improved across chip implant uniformity |
Aug. 4, 2009 |
| 7560331 |
Method for forming a silicided gate |
Jul. 14, 2009 |
| 7544556 |
Process for forming CMOS devices using removable spacers |
Jun. 9, 2009 |
| 7541239 |
Selective spacer formation on transistors of different classes on the same device |
Jun. 2, 2009 |
| 7537988 |
Differential offset spacer |
May. 26, 2009 |
| 7537987 |
Semiconductor device manufacturing method |
May. 26, 2009 |
| 7534674 |
Method of making a semiconductor device with a stressor |
May. 19, 2009 |
| 7528029 |
Stressor integration and method thereof |
May. 5, 2009 |
| 7528030 |
Semiconductor device comprising at least one MOS transistor having an etch stop layer, and corresponding fabrication process |
May. 5, 2009 |
| 7521314 |
Method for selective removal of a layer |
Apr. 21, 2009 |
| 7510923 |
Slim spacer implementation to improve drive current |
Mar. 31, 2009 |
| 7491595 |
Creating high voltage FETs with low voltage process |
Feb. 17, 2009 |
| 7485524 |
MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same |
Feb. 3, 2009 |
| 7473975 |
Fully silicided metal gate semiconductor device structure |
Jan. 6, 2009 |
| 7470562 |
Methods of forming field effect transistors using disposable aluminum oxide spacers |
Dec. 30, 2008 |
| 7465617 |
Method of fabricating a semiconductor device having a silicon oxide layer, a method of fabricating a semiconductor device having dual spacers, a method of forming a silicon oxide layer on a su |
Dec. 16, 2008 |
| 7446354 |
Power semiconductor device having improved performance and method |
Nov. 4, 2008 |
| 7432144 |
Method for forming a transistor for reducing a channel length |
Oct. 7, 2008 |
| 7416940 |
Methods for fabricating flash memory devices |
Aug. 26, 2008 |
| 7416927 |
Method for producing an SOI field effect transistor |
Aug. 26, 2008 |
| 7396716 |
Method to obtain fully silicided poly gate |
Jul. 8, 2008 |
| 7384838 |
Semiconductor FinFET structures with encapsulated gate electrodes and methods for forming such semiconductor FinFET structures |
Jun. 10, 2008 |
| 7381623 |
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance |
Jun. 3, 2008 |
| 7368372 |
Methods of fabricating multiple sets of field effect transistors |
May. 6, 2008 |
| 7364963 |
Method for fabricating semiconductor device |
Apr. 29, 2008 |
| 7344937 |
Methods and apparatus with silicide on conductive structures |
Mar. 18, 2008 |
| 7341903 |
Method of forming a field effect transistor having a stressed channel region |
Mar. 11, 2008 |
| 7314793 |
Technique for controlling mechanical stress in a channel region by spacer removal |
Jan. 1, 2008 |
| 7306995 |
Reduced hydrogen sidewall spacer oxide |
Dec. 11, 2007 |
| 7306983 |
Method for forming dual etch stop liner and protective layer in a semiconductor device |
Dec. 11, 2007 |
| 7282402 |
Method of making a dual strained channel semiconductor device |
Oct. 16, 2007 |
| 7276408 |
Reduction of dopant loss in a gate structure |
Oct. 2, 2007 |
| 7273777 |
Formation of fully silicided (FUSI) gate using a dual silicide process |
Sep. 25, 2007 |
| 7271049 |
Method of forming self-aligned low-k gate cap |
Sep. 18, 2007 |
| 7256084 |
Composite stress spacer |
Aug. 14, 2007 |
| 7256081 |
Structure and method to induce strain in a semiconductor device channel with stressed film under the gate |
Aug. 14, 2007 |
| 7250332 |
Method for fabricating a semiconductor device having improved hot carrier immunity ability |
Jul. 31, 2007 |
| 7229870 |
Methods of fabricating semiconductor devices |
Jun. 12, 2007 |
| 7223650 |
Self-aligned gate isolation |
May. 29, 2007 |
| 7220637 |
Method of manufacturing semiconductor device with offset sidewall structure |
May. 22, 2007 |
| 7208361 |
Replacement gate process for making a semiconductor device that includes a metal gate electrode |
Apr. 24, 2007 |
| 7195969 |
Strained channel CMOS device with fully silicided gate electrode |
Mar. 27, 2007 |
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