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Class Information
Number: 438/228
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > Including isolation structure > Recessed oxide formed by localized oxidation (i.e., locos) > Having well structure of opposite conductivity type > Plural wells
Description: Process for making complementary insulated gate field effect transistors wherein plural wells of the same or opposite conductivity type are formed in the semiconductive substrate, each well utilized for formation therein of an insulated gate field effect transistor.


Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
7605034 Integrated circuit memory cells and methods of forming Oct. 20, 2009
7588978 Method for forming semiconductor device Sep. 15, 2009
7582522 Method and device for CMOS image sensing with separate source formation Sep. 1, 2009
7521312 Method and system for creating self-aligned twin wells with co-planar surfaces in a semiconductor device Apr. 21, 2009
7507596 Method of fabricating a high quantum efficiency photodiode Mar. 24, 2009
7445983 Method of manufacturing a semiconductor integrated circuit device Nov. 4, 2008
7445982 Method of manufacturing a semiconductor integrated circuit device Nov. 4, 2008
7445979 Method of fabricating isolated semiconductor devices in epi-less substrate Nov. 4, 2008
7410855 Semiconductor device Aug. 12, 2008
7371630 Patterned backside stress engineering for transistor performance optimization May. 13, 2008
7368354 Planar substrate devices integrated with FinFETs and method of manufacture May. 6, 2008
7364972 Semiconductor device Apr. 29, 2008
7335546 Method and device for CMOS image sensing with separate source formation Feb. 26, 2008
7329583 Method of fabricating isolated semiconductor devices in epi-less substrate Feb. 12, 2008
7323367 Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions Jan. 29, 2008
7309636 High-voltage metal-oxide-semiconductor device and method of manufacturing the same Dec. 18, 2007
7288451 Method and structure for forming self-aligned, dual stress liner for CMOS devices Oct. 30, 2007
7279378 Method of fabricating isolated semiconductor devices in epi-less substrate Oct. 9, 2007
7279399 Method of forming isolated pocket in a semiconductor substrate Oct. 9, 2007
7273776 Methods of forming a P-well in an integrated circuit device Sep. 25, 2007
7247534 Silicon device on Si:C-OI and SGOI and method of manufacture Jul. 24, 2007
7226832 Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer Jun. 5, 2007
7226834 PMD liner nitride films and fabrication methods for improved NMOS performance Jun. 5, 2007
7211481 Method to strain NMOS devices while mitigating dopant diffusion for PMOS using a capped poly layer May. 1, 2007
7144796 Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate Dec. 5, 2006
7145187 Substrate independent multiple input bi-directional ESD protection structure Dec. 5, 2006
7138311 Semiconductor integrated circuit device and manufacture method therefore Nov. 21, 2006
7132323 CMOS well structure and method of forming the same Nov. 7, 2006
7112480 Method and structure for a low voltage CMOS integrated circuit incorporating higher-voltage devices Sep. 26, 2006
7049699 Low RC structures for routing body-bias voltage May. 23, 2006
7022566 Integrated radio frequency circuits Apr. 4, 2006
7008836 Method to provide a triple well in an epitaxially based CMOS or BiCMOS process Mar. 7, 2006
7005354 Depletion drain-extended MOS transistors and methods for making the same Feb. 28, 2006
7005340 Method for manufacturing semiconductor device Feb. 28, 2006
6995055 Structure of a semiconductor integrated circuit and method of manufacturing the same Feb. 7, 2006
6974742 Method for fabricating complementary metal oxide semiconductor image sensor Dec. 13, 2005
6927116 Semiconductor device having a double-well structure and method for manufacturing the same Aug. 9, 2005
6911694 Semiconductor device and method for fabricating such device Jun. 28, 2005
6908859 Low leakage power transistor and method of forming Jun. 21, 2005
6900081 Method of manufacturing semiconductor integrated circuit device May. 31, 2005
6900091 Isolated complementary MOS devices in epi-less substrate May. 31, 2005
6881634 Buried-channel transistor with reduced leakage current Apr. 19, 2005
6875663 Semiconductor device having a trench isolation and method of fabricating the same Apr. 5, 2005
6875650 Eliminating substrate noise by an electrically isolated high-voltage I/O transistor Apr. 5, 2005
6853037 Fabrication of low power CMOS device with high reliability Feb. 8, 2005
6841430 Semiconductor and fabrication method thereof Jan. 11, 2005
6838328 Back-biased MOS device fabrication method Jan. 4, 2005
6806133 Method for fabricating semiconductor device with triple well structure Oct. 19, 2004
6806160 Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process Oct. 19, 2004
6787410 Semiconductor device having dynamic threshold transistors and element isolation region and fabrication method thereof Sep. 7, 2004

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