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Class Information
Number: 438/226
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > Including isolation structure > Recessed oxide formed by localized oxidation (i.e., locos) > With epitaxial semiconductor layer formation
Description: Process for making complementary insulated gate field effect transistors with dielectric isolation formed by selectively oxidizing semiconductive regions of the substrate combined with a step of forming an epitaxial semiconductor layer.

Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8685773 Method for making semiconductor epitaxial structure Apr. 1, 2014
8440017 Method for growing group 13 nitride crystal and group 13 nitride crystal May. 14, 2013
8338246 Method for fabricating a semiconductor device having a device isolation trench Dec. 25, 2012
8049231 Quantum photonic imagers and methods of fabrication thereof Nov. 1, 2011
8012833 Semiconductor device and method of fabricating the same Sep. 6, 2011
7972971 Method for producing Si.sub.1-yGe.sub.y based zones with different contents in Ge on a same substrate by condensation of germanium Jul. 5, 2011
7972922 Method of forming a semiconductor layer Jul. 5, 2011
7947569 Method for producing a semiconductor including a foreign material layer May. 24, 2011
7939413 Embedded stressor structure and process May. 10, 2011
7902030 Manufacturing method for semiconductor device and semiconductor device Mar. 8, 2011
7795089 Forming a semiconductor device having epitaxially grown source and drain regions Sep. 14, 2010
7785975 SOI device with improved storage capacity and method for manufacturing the same Aug. 31, 2010
7776698 Selective formation of silicon carbon epitaxial layer Aug. 17, 2010
7763510 Method for PFET enhancement Jul. 27, 2010
7759229 Charge-free method of forming nanostructures on a substrate Jul. 20, 2010
7704809 Silicon-on-insulator chip with multiple crystal orientations Apr. 27, 2010
7687337 Transistor with differently doped strained current electrode region Mar. 30, 2010
7682887 Transistor having high mobility channel and methods Mar. 23, 2010
7655533 Semiconductor device having reduced standby leakage current and increased driving current and method for manufacturing the same Feb. 2, 2010
7648853 Dual channel heterostructure Jan. 19, 2010
7648893 Method for manufacturing a semiconductor-on-insulator substrate for microelectronics and optoelectronics Jan. 19, 2010
7629233 Hybrid crystal orientation CMOS structure for adaptive well biasing and for power and performance enhancement Dec. 8, 2009
7615390 Method and apparatus for forming expitaxial layers Nov. 10, 2009
7601582 Method for manufacturing a semiconductor device having a device isolation trench Oct. 13, 2009
7598142 CMOS device with dual-epi channels and self-aligned contacts Oct. 6, 2009
7524707 Modified hybrid orientation technology Apr. 28, 2009
7510925 Method of manufacturing semiconductor device, and semiconductor device Mar. 31, 2009
7432167 Method of fabricating a strained silicon channel metal oxide semiconductor transistor Oct. 7, 2008
7402477 Method of making a multiple crystal orientation semiconductor device Jul. 22, 2008
7402485 Method of forming a semiconductor device Jul. 22, 2008
7393762 Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate Jul. 1, 2008
7320923 SRAM cell Jan. 22, 2008
7145187 Substrate independent multiple input bi-directional ESD protection structure Dec. 5, 2006
7029979 Methods for manufacturing semiconductor devices Apr. 18, 2006
6881641 Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same Apr. 19, 2005
6833589 Method for manufacturing field effect transistor Dec. 21, 2004
6815278 Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations Nov. 9, 2004
6723618 Methods of forming field isolation structures Apr. 20, 2004
6667200 Method for forming transistor of semiconductor device Dec. 23, 2003
6657262 Monolithically integrated electronic device and fabrication process therefor Dec. 2, 2003
6649481 Methods of fabricating a semiconductor device structure for manufacturing high-density and high-performance integrated-circuits Nov. 18, 2003
6627515 Method of fabricating a non-floating body device with enhanced performance Sep. 30, 2003
6620671 Method of fabricating transistor having a single crystalline gate conductor Sep. 16, 2003
6455377 Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) Sep. 24, 2002
6423599 Method for fabricating a field effect transistor having dual gates in SOI (semiconductor on insulator) technology Jul. 23, 2002
6413829 Field effect transistor in SOI technology with schottky-contact extensions Jul. 2, 2002
6376293 Shallow drain extenders for CMOS transistors using replacement gate design Apr. 23, 2002
6368925 Method of forming an EPI-channel in a semiconductor device Apr. 9, 2002
6316303 Method of fabricating a MOS transistor having SEG silicon Nov. 13, 2001
6303441 Semiconductor device and method for fabricating the same Oct. 16, 2001

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