Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Browse by Category: Main > Engineering
Class Information
Number: 438/218
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > Including isolation structure
Description: Process for making complementary field effect transistors having a structure serving to at least partially electrically isolate the semiconductive region in which one transistor is formed from laterally adjacent semiconductive regions.










Sub-classes under this class:

Class Number Class Name Patents
438/221 Dielectric isolation formed by grooving and refilling with dielectric material 505
438/220 Isolation by pn junction only 114
438/225 Recessed oxide formed by localized oxidation (i.e., locos) 199
438/219 Total dielectric isolation 125


Patents under this class:
1 2 3 4 5 6 7

Patent Number Title Of Patent Date Issued
8710569 Semiconductor device and manufacturing method thereof Apr. 29, 2014
8692266 Circuit substrate structure Apr. 8, 2014
8685812 Logic switch and circuits utilizing the switch Apr. 1, 2014
8685816 Methods of forming semiconductor devices by forming semiconductor channel region materials prior to forming isolation structures Apr. 1, 2014
8679938 Shallow trench isolation for device including deep trench capacitors Mar. 25, 2014
8669617 Multi-gate transistors Mar. 11, 2014
8664058 Semiconductor device having silicon on stressed liner (SOL) Mar. 4, 2014
8658475 Stacked body-contacted field effect transistor Feb. 25, 2014
8647941 Method of forming semiconductor device Feb. 11, 2014
8642429 Wide and deep oxide trench in a semiconductor substrate with interspersed vertical oxide ribs Feb. 4, 2014
8617948 Reducing resistance in source and drain regions of FinFETs Dec. 31, 2013
8617968 Strained silicon and strained silicon germanium on insulator metal oxide semiconductor field effect transistors (MOSFETs) Dec. 31, 2013
8617946 Integrated circuits including metal gates and fabrication methods thereof Dec. 31, 2013
8610172 FETs with hybrid channel materials Dec. 17, 2013
8604543 Compensated isolated p-well DENMOS devices Dec. 10, 2013
8592272 Method of manufacturing non-volatile semiconductor memory device Nov. 26, 2013
8580625 Metal oxide semiconductor transistor and method of manufacturing the same Nov. 12, 2013
8575694 Insulated gate bipolar transistor structure having low substrate leakage Nov. 5, 2013
8546212 Semiconductor device and fabricating method thereof Oct. 1, 2013
8530299 Electronic device including a well region Sep. 10, 2013
8513087 Processes for forming isolation structures for integrated circuit devices Aug. 20, 2013
8497171 FinFET method and structure with embedded underlying anti-punch through layer Jul. 30, 2013
8497170 Semiconductor device manufacture method and semiconductor device Jul. 30, 2013
8476127 Integrated lateral high voltage MOSFET Jul. 2, 2013
8461652 Semiconductor device having an n-channel MOS transistor, a p-channel MOS transistor and a contracting film Jun. 11, 2013
8394695 Semiconductor device production method Mar. 12, 2013
8367494 Electrical fuse formed by replacement metal gate process Feb. 5, 2013
8362558 Low on-resistance lateral double-diffused MOS device Jan. 29, 2013
8361857 Semiconductor device having a simplified stack and method for manufacturing thereof Jan. 29, 2013
8354322 Fabricating and operating a memory array having a multi-level cell region and a single-level cell region Jan. 15, 2013
8350336 Semiconductor device and method of manufacturing the same Jan. 8, 2013
8338919 Semiconductor device with strain Dec. 25, 2012
8329531 Strain memorization in strained SOI substrates of semiconductor devices Dec. 11, 2012
8318559 Method of fabricating CMOS transistor Nov. 27, 2012
8283226 Method for manufacturing semiconductor device Oct. 9, 2012
8278717 Semiconductor memory device and method of manufacturing the same Oct. 2, 2012
8268662 Fabricating method of complementary metal-oxide-semiconductor (CMOS) image sensor Sep. 18, 2012
8247279 Method of fabricating semiconductor device using epitaxial growth inhibiting layers Aug. 21, 2012
8247297 Method of filling large deep trench with high quality oxide for semiconductor devices Aug. 21, 2012
8242027 Semiconductor device manufacturing method Aug. 14, 2012
8236638 Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner Aug. 7, 2012
8236636 Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same Aug. 7, 2012
8232158 Compensated isolated p-well DENMOS devices Jul. 31, 2012
8222093 Methods for forming barrier regions within regions of insulating material resulting in outgassing paths from the insulating material and related devices Jul. 17, 2012
8222100 CMOS circuit with low-k spacer and stress liner Jul. 17, 2012
8216895 Semiconductor device and method of manufacturing the same Jul. 10, 2012
8211741 Carbon nanotube based integrated semiconductor circuit Jul. 3, 2012
8207030 Method for producing nMOS and pMOS devices in CMOS processing Jun. 26, 2012
8173501 Reduced STI topography in high-K metal gate transistors by using a mask after channel semiconductor alloy deposition May. 8, 2012
8138523 Semiconductor device having silicon on stressed liner (SOL) Mar. 20, 2012

1 2 3 4 5 6 7










 
 
  Recently Added Patents
Polarization-coupled ferroelectric unipolar junction memory and energy storage device
Caching techniques
Buried object detection in GPR images
Visibility radio cap and network
Switchgear operating apparatus and three-phase switchgear
Method and composition for hyperthermally treating cells
Computerized on-board system for controlling a train
  Randomly Featured Patents
Reverse osmosis apparatus
Obtaining identification information for a neighboring network element
Advanced touch control of interactive immersive imaging applications via finger angle using a high dimensional touchpad (HDTP) touch user interface
Plasma processing system using surface wave plasma generating apparatus and method
Compound semiconductor device having a semiconductor-converted conductive region
DRM system for devices communicating with a portable device
Cathodic production of micropores in chromium
Substrate for electro-optical device having particular concave portions and convex portions and flat section on the surface of a base layer
Harness adjustment mechanism
Strip deflector unit