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Class Information
Number: 438/212
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > Vertical channel
Description: Process for making complementary insulated gate field effect transistors wherein the active channel region of at least one of the transistors is configured to provide, at least in part, a vertically conductive pathway between source and drain regions.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8709893 Method of making a low-Rdson vertical power MOSFET device Apr. 29, 2014
8685788 Nanowire tunneling field effect transistor with vertical structure and a manufacturing method thereof Apr. 1, 2014
8679903 Vertical quadruple conduction channel insulated gate transistor Mar. 25, 2014
8673700 Superjunction structures for power devices and methods of manufacture Mar. 18, 2014
8664048 Semiconductor devices with minimized current flow differences and methods of same Mar. 4, 2014
8653504 Complementary tunneling field effect transistor and method for forming the same Feb. 18, 2014
8643094 Method of forming a self-aligned contact opening in MOSFET Feb. 4, 2014
8643096 Semiconductor device with buried bit line and method for fabricating the same Feb. 4, 2014
8633095 Semiconductor device with voltage compensation structure Jan. 21, 2014
8618604 Semiconductor device and method of manufacturing the same Dec. 31, 2013
8613861 Method of manufacturing vertical transistors Dec. 24, 2013
8603891 Methods for forming vertical memory devices and apparatuses Dec. 10, 2013
8592902 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure Nov. 26, 2013
8580634 Methods of forming 3-D semiconductor devices with a nanowire gate structure wherein the nanowire gate structure is formed prior to source/drain formation Nov. 12, 2013
8574974 Method of manufacturing a semiconductor device Nov. 5, 2013
8563373 Semiconductor device having vertical channels and method of manufacturing the same Oct. 22, 2013
8564057 Power devices, structures, components, and methods using lateral drift, fixed net charge, and shield Oct. 22, 2013
8551834 Method of producing precision vertical and horizontal layers in a vertical semiconductor structure Oct. 8, 2013
8541274 Methods of forming 3-D semiconductor devices with a nanowire gate structure wherein the nanowire gate structure is formed after source/drain formation Sep. 24, 2013
8530300 Semiconductor device with drift regions and compensation regions Sep. 10, 2013
8530301 MOS device with substrate potential elevation for ESD protection Sep. 10, 2013
8525253 Double-sided semiconductor structure and method for manufacturing same Sep. 3, 2013
8518770 Recessed contact for multi-gate FET optimizing series resistance Aug. 27, 2013
8519475 Semiconductor device Aug. 27, 2013
8513125 Manufacturing a microelectronic device comprising silicon and germanium nanowires integrated on a same substrate Aug. 20, 2013
8513675 Vertical junction field effect transistors having sloped sidewalls and methods of making Aug. 20, 2013
8507349 Semiconductor device employing fin-type gate and method for manufacturing the same Aug. 13, 2013
8487367 Planar MOSFET with textured channel and gate Jul. 16, 2013
8482062 Semiconductor device having a floating semiconductor zone Jul. 9, 2013
8482041 Semiconductor structure and method of fabricating the semiconductor structure Jul. 9, 2013
8481410 Methods of epitaxial FinFET Jul. 9, 2013
8476137 Methods of FinFET height control Jul. 2, 2013
8461003 Method for fabricating 3D-nonvolatile memory device Jun. 11, 2013
8461028 Synthesizing graphene from metal-carbon solutions using ion implantation Jun. 11, 2013
8450177 LDMOS with self aligned vertical LDD backside drain May. 28, 2013
8445343 Methods of fabricating semiconductor devices including semiconductor layers formed in stacked insulating layers May. 21, 2013
8435851 Implementing semiconductor SoC with metal via gate node high performance stacked transistors May. 7, 2013
8435847 Semiconductor device and method for fabricating the same May. 7, 2013
8421147 MOS transistor with elevated gate drain capacity Apr. 16, 2013
8404531 Method for fabricating a power transistor Mar. 26, 2013
8399319 Semiconductor device and method for manufacturing the same Mar. 19, 2013
8383477 Semiconductor device including vertical transistor and method for manufacturing the same Feb. 26, 2013
8384142 Non-planar thin fin transistor Feb. 26, 2013
8377813 Split word line fabrication process Feb. 19, 2013
8362546 Cross-point diode arrays and methods of manufacturing cross-point diode arrays Jan. 29, 2013
8361856 Memory cells, arrays of memory cells, and methods of forming memory cells Jan. 29, 2013
8354311 Method for forming nanofin transistors Jan. 15, 2013
8343820 Method for fabricating vertical channel type non-volatile memory device Jan. 1, 2013
8329537 Method for fabricating rewritable three-dimensional memory device Dec. 11, 2012
8318558 Semiconductor device and method for forming the same Nov. 27, 2012

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