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Class Information
Number: 438/202
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And additional electrical device > Including bipolar transistor (i.e., bicmos)
Description: Process for making complementary insulated gate field effect transistors combined with a bipolar transistor.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7625792 |
Method of base formation in a BiCMOS process |
Dec. 1, 2009 |
| 7598136 |
Image sensor and related fabrication method |
Oct. 6, 2009 |
| 7595231 |
Semiconductor device and its manufacture |
Sep. 29, 2009 |
| 7582502 |
Method for manufacturing back side illumination image sensor |
Sep. 1, 2009 |
| 7579230 |
High voltage BICMOS device and method for manufacturing the same |
Aug. 25, 2009 |
| 7569448 |
Semiconductor device including bipolar junction transistor with protected emitter-base junction |
Aug. 4, 2009 |
| 7569445 |
Semiconductor device with constricted current passage |
Aug. 4, 2009 |
| 7534680 |
Bipolar transistor, BiCMOS device, and method for fabricating thereof |
May. 19, 2009 |
| 7534679 |
System and method for producing a semiconductor circuit arrangement |
May. 19, 2009 |
| 7524718 |
Method for manufacturing photoelectric transducer, and electronic apparatus |
Apr. 28, 2009 |
| 7488638 |
Method for fabricating a voltage-stable PMOSFET semiconductor structure |
Feb. 10, 2009 |
| 7470594 |
System and method for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor |
Dec. 30, 2008 |
| 7465636 |
Methods for forming semiconductor wires and resulting devices |
Dec. 16, 2008 |
| 7456070 |
Method of fabricating a bipolar transistor with high breakdown voltage collector |
Nov. 25, 2008 |
| 7456061 |
Method to reduce boron penetration in a SiGe bipolar device |
Nov. 25, 2008 |
| 7449389 |
Method for fabricating a semiconductor structure |
Nov. 11, 2008 |
| 7442602 |
Methods of fabricating phase change memory cells having a cell diode and a bottom electrode self-aligned with each other |
Oct. 28, 2008 |
| 7427542 |
Semiconductor device and method of manufacturing the same |
Sep. 23, 2008 |
| 7415318 |
Method and apparatus for manufacturing semiconductor device |
Aug. 19, 2008 |
| 7393739 |
Demultiplexers using transistors for accessing memory cell arrays |
Jul. 1, 2008 |
| 7384836 |
Integrated circuit transistor insulating region fabrication method |
Jun. 10, 2008 |
| 7371650 |
Method for producing a transistor structure |
May. 13, 2008 |
| 7358573 |
Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same |
Apr. 15, 2008 |
| 7344989 |
CMP wafer contamination reduced by insitu clean |
Mar. 18, 2008 |
| 7341905 |
Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices |
Mar. 11, 2008 |
| 7338847 |
Methods of manufacturing a stressed MOS transistor structure |
Mar. 4, 2008 |
| 7338848 |
Method for opto-electronic integration on a SOI substrate and related structure |
Mar. 4, 2008 |
| 7339236 |
Semiconductor device, driver circuit and manufacturing method of semiconductor device |
Mar. 4, 2008 |
| 7335547 |
Method for effective BiCMOS process integration |
Feb. 26, 2008 |
| 7329570 |
Method for manufacturing a semiconductor device |
Feb. 12, 2008 |
| 7297584 |
Methods of fabricating semiconductor devices having a dual stress liner |
Nov. 20, 2007 |
| 7288450 |
General protection of an integrated circuit against permant overloads and electrostatic discharges |
Oct. 30, 2007 |
| 7285454 |
Bipolar transistors with low base resistance for CMOS integrated circuits |
Oct. 23, 2007 |
| 7285455 |
Method of producing the same |
Oct. 23, 2007 |
| 7282402 |
Method of making a dual strained channel semiconductor device |
Oct. 16, 2007 |
| 7271045 |
Etch stop and hard mask film property matching to enable improved replacement metal gate process |
Sep. 18, 2007 |
| 7268398 |
ESD protection cell with active pwell resistance control |
Sep. 11, 2007 |
| 7265010 |
High performance vertical PNP transistor method |
Sep. 4, 2007 |
| 7262107 |
Capacitor structure for a logic process |
Aug. 28, 2007 |
| 7247532 |
High voltage transistor and method for fabricating the same |
Jul. 24, 2007 |
| 7244635 |
Semiconductor device and method of manufacturing the same |
Jul. 17, 2007 |
| 7238562 |
Method for fabricating CMOS image sensor |
Jul. 3, 2007 |
| 7226844 |
Method of manufacturing a bipolar transistor with a single-crystal base contact |
Jun. 5, 2007 |
| 7220633 |
Method of fabricating a lateral double-diffused MOSFET |
May. 22, 2007 |
| 7205188 |
Method for producing high-speed vertical npn bipolar transistors and complementary MOS transistors on a chip |
Apr. 17, 2007 |
| 7198998 |
Method of manufacturing bipolar-complementary metal oxide semiconductor |
Apr. 3, 2007 |
| 7195965 |
Premature breakdown in submicron device geometries |
Mar. 27, 2007 |
| 7189603 |
Thin film transistor substrate and its manufacture |
Mar. 13, 2007 |
| 7189606 |
Method of forming fully-depleted (FD) SOI MOSFET access transistor |
Mar. 13, 2007 |
| 7186610 |
ESD protection device for high performance IC |
Mar. 6, 2007 |
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