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Class Information
Number: 438/201
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And additional electrical device > Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate)
Description: Process for making complementary insulated gate field effect transistors having combined therewith an additional insulated gate field effect transistor possessing a gate electrode enclosed by dielectric.

Patents under this class:
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Patent Number Title Of Patent Date Issued
5538912 Method of making memory cells with peripheral transistors Jul. 23, 1996
5506159 Method for manufacturing a semiconductor memory device Apr. 9, 1996
5486486 Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices Jan. 23, 1996
5445980 Method of making a semiconductor memory device Aug. 29, 1995
5427966 Process for fabricating a semiconductor device having floating gate and control gate electrodes Jun. 27, 1995
5352620 Method of making semiconductor device with memory cells and peripheral transistors Oct. 4, 1994
5340764 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer Aug. 23, 1994
5324677 Method of making memory cell and a peripheral circuit Jun. 28, 1994
5322803 Process for the manufacture of a component to limit the programming voltage and to stabilize the voltage incorporated in an electric device with EEPROM memory cells Jun. 21, 1994
5316963 Method for producing semiconductor device May. 31, 1994
5292681 Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors Mar. 8, 1994
5290725 Semiconductor memory device and a method for producing the same Mar. 1, 1994
5248624 Method of making isolated vertical PNP transistor in a complementary BICMOS process with EEPROM memory Sep. 28, 1993
5223451 Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip and method of making it Jun. 29, 1993
5198374 Method of making biCMOS integrated circuit with shallow N-wells Mar. 30, 1993
5183773 Method of manufacturing semiconductor device including such input protection transistor Feb. 2, 1993
5175120 Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors Dec. 29, 1992
5156990 Floating-gate memory cell with tailored doping profile Oct. 20, 1992
5153143 Method of manufacturing CMOS integrated circuit with EEPROM Oct. 6, 1992
5098855 Semiconductor device and method of producing the same Mar. 24, 1992
5089433 Bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture Feb. 18, 1992
5086008 Process for obtaining high-voltage N channel transistors particularly for EEPROM memories with CMOS technology Feb. 4, 1992
5036018 Method of manufacturing CMOS EPROM memory cells Jul. 30, 1991
5013674 A method of manufacturing integrated circuits comprising EPROM memory and logic transistors May. 7, 1991
4931411 Integrated circuit process with TiN-gate transistor Jun. 5, 1990
4859619 EPROM fabrication process forming tub regions for high voltage devices Aug. 22, 1989
4851361 Fabrication process for EEPROMS with high voltage transistors Jul. 25, 1989
4833096 EEPROM fabrication process May. 23, 1989
4830974 EPROM fabrication process May. 16, 1989
4784966 Self-aligned NPN bipolar transistor built in a double polysilicon CMOS technology Nov. 15, 1988
4775642 Modified source/drain implants in a double-poly non-volatile memory process Oct. 4, 1988
4766088 Method of making a memory device with polysilicon electrodes Aug. 23, 1988
4745083 Method of making a fast IGFET May. 17, 1988
4646425 Method for making a self-aligned CMOS EPROM wherein the EPROM floating gate and CMOS gates are made from one polysilicon layer Mar. 3, 1987
4598460 Method of making a CMOS EPROM with independently selectable thresholds Jul. 8, 1986
4590665 Method for double doping sources and drains in an EPROM May. 27, 1986
4567641 Method of fabricating semiconductor devices having a diffused region of reduced length Feb. 4, 1986
3967981 Method for manufacturing a semiconductor field effort transistor Jul. 6, 1976

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