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Class Information
Number: 438/201
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having insulated gate (e.g., igfet, misfet, mosfet, etc.) > Complementary insulated gate field effect transistors (i.e., cmos) > And additional electrical device > Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate)
Description: Process for making complementary insulated gate field effect transistors having combined therewith an additional insulated gate field effect transistor possessing a gate electrode enclosed by dielectric.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6174759 Method of manufacturing a semiconductor device Jan. 16, 2001
6156610 Process for manufacturing an EEPROM having a peripheral transistor with thick oxide Dec. 5, 2000
6153463 Triple plate capacitor and method for manufacturing Nov. 28, 2000
6136648 Nonvolatile semiconductor memory device and a method of fabricating the same Oct. 24, 2000
6133610 Silicon-on-insulator chip having an isolation barrier for reliability and process of manufacture Oct. 17, 2000
6124177 Method for making deep sub-micron mosfet structures having improved electrical characteristics Sep. 26, 2000
6124157 Integrated non-volatile and random access memory and method of forming the same Sep. 26, 2000
6121079 Method for manufacturing a semiconductor memory device Sep. 19, 2000
6114203 Method of manufacturing a MOS integrated circuit having components with different dielectrics Sep. 5, 2000
6090652 Method of manufacturing a semiconductor device including implanting threshold voltage adjustment ions Jul. 18, 2000
6087211 Method for forming a semiconductor device having non-volatile memory cells, High-voltage transistors, and low-voltage, deep sub-micron transistors Jul. 11, 2000
6080611 Semiconductor device and production thereof Jun. 27, 2000
6071778 Memory device with a memory cell array in triple well, and related manufacturing process Jun. 6, 2000
6069034 DMOS architecture using low N-source dose co-driven with P-body implant compatible with E.sup.2 PROM core process May. 30, 2000
6069033 Method of manufacturing a non-volatile memory and a CMOS transistor May. 30, 2000
6063662 Methods for forming a control gate apparatus in non-volatile memory semiconductor devices May. 16, 2000
6060743 Semiconductor memory device having multilayer group IV nanocrystal quantum dot floating gate and method of manufacturing the same May. 9, 2000
6048766 Flash memory device having high permittivity stacked dielectric and fabrication thereof Apr. 11, 2000
6037221 Device and fabricating method of non-volatile memory Mar. 14, 2000
6037625 Semiconductor device with salicide structure and fabrication method thereof Mar. 14, 2000
6020229 Semiconductor device method for manufacturing Feb. 1, 2000
6008090 Method of forming high density flash memories with high capacitive-couping ratio and high speed operation Dec. 28, 1999
6004829 Method of increasing end point detection capability of reactive ion etching by adding pad area Dec. 21, 1999
6004847 Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC Dec. 21, 1999
5981320 Method of fabricating cmosfet Nov. 9, 1999
5953602 EEPROM cell and related method of making thereof Sep. 14, 1999
5933732 Nonvolatile devices with P-channel EEPROM devices as injector Aug. 3, 1999
5930613 Method of making EPROM in high density CMOS having metallization capacitor Jul. 27, 1999
5920779 Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits Jul. 6, 1999
5911105 Flash memory manufacturing method Jun. 8, 1999
5907779 Selective landing pad fabricating methods for integrated circuits May. 25, 1999
5904518 Method of manufacturing a semiconductor IC device having single transistor type nonvolatile memory cells May. 18, 1999
5899713 Method of making NVRAM cell with planar control gate May. 4, 1999
5854099 DMOS process module applicable to an E.sup.2 CMOS core process Dec. 29, 1998
5798279 Method of fabricating non-volatile memories with overlapping layers Aug. 25, 1998
5780328 Process for producing semiconductor integrated circuit Jul. 14, 1998
5744373 Method of manufacturing a semiconductor device Apr. 28, 1998
5712178 Non-volatile semiconductor memory device and method for manufacturing the same Jan. 27, 1998
5702959 Method for making an isolated vertical transistor Dec. 30, 1997
5663084 Method for manufacturing nonvolatile semiconductor memory device Sep. 2, 1997
5663080 Process for manufacturing MOS-type integrated circuits Sep. 2, 1997
5656522 Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements Aug. 12, 1997
5650346 Method of forming MOSFET devices with buried bitline capacitors Jul. 22, 1997
5631178 Method for forming a stable semiconductor device having an arsenic doped ROM portion May. 20, 1997
5604150 Channel-stop process for use with thick-field isolation regions in triple-well structures Feb. 18, 1997
5591658 Method of fabricating integrated circuit chip containing EEPROM and capacitor Jan. 7, 1997
5587332 Method of making flash memory cell Dec. 24, 1996
5578515 Method for fabricating gate structure for nonvolatile memory device comprising an EEPROM and a latch transistor Nov. 26, 1996
5550072 Method of fabrication of integrated circuit chip containing EEPROM and capacitor Aug. 27, 1996
5538912 Method of making memory cells with peripheral transistors Jul. 23, 1996

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