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Class Information
Number: 438/189
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having junction gate (e.g., jfet, sit, etc.) > And bipolar transistor
Description: Process for making a junction gate field effect transistor which additionally contains a bipolar transistor.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6153453 JFET transistor manufacturing method Nov. 28, 2000
6063655 Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication May. 16, 2000
6060347 Method for preventing damage to gate oxide from well in complementary metal-oxide semiconductor May. 9, 2000
6050827 Method of manufacturing a thin-film transistor with reinforced drain and source electrodes Apr. 18, 2000
5652153 Method of making JFET structures for semiconductor devices with complementary bipolar transistors Jul. 29, 1997
5618688 Method of forming a monolithic semiconductor integrated circuit having an N-channel JFET Apr. 8, 1997
5391504 Method for producing integrated quasi-complementary bipolar transistors and field effect transistors Feb. 21, 1995
5296409 Method of making n-channel and p-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process Mar. 22, 1994
5254864 Semiconductor device Oct. 19, 1993
5246871 Method of manufacturing a semiconductor device comprising a control circuit and a power stage with a vertical current flow, integrated in monolithic form on a single chip Sep. 21, 1993
5223449 Method of making an integrated circuit composed of group III-V compound field effect and bipolar semiconductors Jun. 29, 1993
4939099 Process for fabricating isolated vertical bipolar and JFET transistors Jul. 3, 1990
4808547 Method of fabrication of high voltage IC bopolar transistors operable to BV.sub.CBO Feb. 28, 1989
4783423 Fabrication of a semiconductor device containing deep emitter and another transistor with shallow doped region Nov. 8, 1988
4737469 Controlled mode field effect transistors and method therefore Apr. 12, 1988
4596068 Process for minimizing boron depletion in N-channel FET at the silicon-silicon oxide interface Jun. 24, 1986
4553318 Method of making integrated PNP and NPN bipolar transistors and junction field effect transistor Nov. 19, 1985
4512815 Simplified BIFET process Apr. 23, 1985
4481707 Method for the fabrication of dielectric isolated junction field effect transistor and PNP transistor Nov. 13, 1984
4449284 Method of manufacturing an integrated circuit device having vertical field effect transistors May. 22, 1984
4395812 Forming an integrated circuit Aug. 2, 1983
4393574 Method for fabricating integrated circuits Jul. 19, 1983
4380481 Method for fabricating semiconductor devices Apr. 19, 1983
4362574 Integrated circuit and manufacturing method Dec. 7, 1982
4325180 Process for monolithic integration of logic, control, and high voltage interface circuitry Apr. 20, 1982
4314267 Dense high performance JFET compatible with NPN transistor formation and merged BIFET Feb. 2, 1982
4216038 Semiconductor device and manufacturing process thereof Aug. 5, 1980
4089021 Semiconductor device capable of withstanding high voltage and method of manufacturing same May. 9, 1978
4066917 Circuit combining bipolar transistor and JFET's to produce a constant voltage characteristic Jan. 3, 1978
4049476 Method of manufacturing a semiconductor integrated circuit device which includes at least one V-groove jfet and one bipolar transistor Sep. 20, 1977
3936929 Fet and bipolar device and circuit process with maximum junction control Feb. 10, 1976

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