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Class Information
Number: 438/187
Name: Semiconductor device manufacturing: process > Making field effect device having pair of active regions separated by gate structure by formation or alteration of semiconductive active regions > Having junction gate (e.g., jfet, sit, etc.) > Specified crystallographic orientation
Description: Process wherein a given feature of the junction gate field effect device is formed in a definite crystallographic orientation relative to the substrate.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8686425 Method for manufacturing semiconductor device Apr. 1, 2014
8673709 FinFETs with multiple fin heights Mar. 18, 2014
8653630 Layout for multiple-Fin SRAM cell Feb. 18, 2014
8592289 Epitaxial wafer, method for manufacturing gallium nitride semiconductor device, gallium nitride semiconductor device and gallium oxide wafer Nov. 26, 2013
8592946 Lithography for printing constant line width features Nov. 26, 2013
8551846 Methods for fabricating semiconductor devices Oct. 8, 2013
8524552 Normally-off power JFET and manufacturing method thereof Sep. 3, 2013
8508682 Peeling method and method for manufacturing display device using the peeling method Aug. 13, 2013
8450165 Semiconductor device having tipless epitaxial source/drain regions May. 28, 2013
8426261 High-k heterostructure Apr. 23, 2013
8421059 Strain-inducing semiconductor regions Apr. 16, 2013
8093110 Method for manufacturing thin film transistor Jan. 10, 2012
8016941 Method and apparatus for manufacturing a semiconductor Sep. 13, 2011
7999246 Semiconductor memory device and method of manufacturing the same Aug. 16, 2011
7986029 Dual SOI structure Jul. 26, 2011
7977169 Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof Jul. 12, 2011
7960264 Lithography for printing constant line width features Jun. 14, 2011
7863117 Multilayer silicon over insulator device Jan. 4, 2011
7863169 Lithography for printing constant line width features Jan. 4, 2011
7842616 Methods for fabricating semiconductor structures Nov. 30, 2010
7816274 Methods for normalizing strain in a semiconductor device Oct. 19, 2010
7807523 Sequential selective epitaxial growth Oct. 5, 2010
7804130 Self-aligned V-channel MOSFET Sep. 28, 2010
7795081 Method for manufacturing thin film transistor Sep. 14, 2010
7767540 Transistor having a channel with tensile strain and oriented along a crystallographic orientation with increased charge carrier mobility Aug. 3, 2010
7763505 Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations Jul. 27, 2010
7755172 Opto-electronic and electronic devices using N-face or M-plane GaN substrate prepared with ammonothermal growth Jul. 13, 2010
7691688 Strained silicon CMOS on hybrid crystal orientations Apr. 6, 2010
7682932 Method for fabricating a hybrid orientation substrate Mar. 23, 2010
7674660 Multilevel semiconductor device and method of manufacturing the same Mar. 9, 2010
7674667 CMOS structure including topographic active region Mar. 9, 2010
7498208 Chevron CMOS trigate structure Mar. 3, 2009
7494858 Transistor with improved tip profile and method of manufacture thereof Feb. 24, 2009
7442589 System and method for uniform multi-plane silicon oxide layer formation for optical applications Oct. 28, 2008
7291520 Piezoelectric element and liquid jet head using the piezoelectric element Nov. 6, 2007
7256109 Isotropic polycrystalline silicon Aug. 14, 2007
7235435 Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization Jun. 26, 2007
7151019 Method of manufacturing a semiconductor device with different lattice properties Dec. 19, 2006
6998639 Method for manufacturing a semiconductor device Feb. 14, 2006
6855606 Semiconductor nano-rod devices Feb. 15, 2005
6808951 Semiconductor integrated circuit device and manufacturing method thereof Oct. 26, 2004
6767804 2N mask design and method of sequential lateral solidification Jul. 27, 2004
6740535 Enhanced T-gate structure for modulation doped field effect transistors May. 25, 2004
6649462 Semiconductor device and method of manufacturing the same including T-shaped gate Nov. 18, 2003
6255202 Damascene T-gate using a spacer flow Jul. 3, 2001
6110764 Method of manufacturing an assembly with different types of high-voltage metal-oxide-semiconductor devices Aug. 29, 2000
6077777 Method for forming wires of semiconductor device Jun. 20, 2000
RE36441 Semiconductor device and a method of manufacturing same Dec. 14, 1999
5946548 Method for manufacturing a MISFET device where the conductive film has a thickness Aug. 31, 1999
5702987 Method of manufacture of self-aligned JFET Dec. 30, 1997

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